參數(shù)資料
型號(hào): IDT72825LB35BG
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: DRAM
英文描述: CMOS DUAL SyncFIFO DUAL 256 x 18, DUAL 512 x 18, DUAL 1,024 x 18, DUAL 2,048 x 18, and DUAL 4,096 x 18
中文描述: 2K X 18 BI-DIRECTIONAL FIFO, PBGA121
封裝: 16 X 16 MM, PLASTIC, BGA-121
文件頁數(shù): 13/26頁
文件大?。?/td> 334K
代理商: IDT72825LB35BG
13
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
IDT72805LB/72815LB/72825LB/72835LB/72845LB CMOS Dual SyncFIFO
TM
256 x 18, 512 x 18, 1,024 x 18, 2,048 x 18 and 4,096 x 18
Figure 7. Read Cycle Timing with Single Register-Buffered EF (IDT Standard Mode)
NOTES:
1. t
SKEW1
is the mnimumtime between a rising WCLK edge and a rising RCLK edge to guarantee that
EF
will go HIGH during the current clock cycle. If the time between the rising edge
of WCLK and the rising edge of RCLK is less than t
SKEW1
, then
EF
may not change state until the next RCLK edge.
2. Select this mode by setting (
FL
,
RXI
,
WXI
) = (0,0,0), (0,1,1), (1,0,0) or (1,1,1) during Reset.
Figure 8. First Data Word Latency with Single Register-Buffered EF (IDT Standard Mode)
NO OPERATION
RCLK
REN
EF
t
CLK
t
CLKH
t
CLKL
t
ENS
t
ENH
t
REF
t
REF
VALID DATA
t
A
t
OLZ
t
OE
t
OHZ
Q
0
- Q
17
OE
WCLK
WEN
t
SKEW1(1)
3139 drw 07
WCLK
D
0
- D
17
WEN
RCLK
EF
Q
0
- Q
17
REN
t
DS
t
SKEW1
t
ENS
t
REF
t
A
0
1
2
3
D
D
D
D
0
1
D
D
(first valid write)
t
OE
t
OLZ
OE
t
A
t
FRL(1)
D
4
t
ENS
3139 drw 08
NOTES:
1. When t
SKEW1
mnimumspecification, t
FRL
(maximum = t
CLK
+ t
SKEW1
. When t
SKEW1
< mnimumspecification, t
FRL
(maximum = either 2*t
CLK
+ t
SKEW1 or
t
CLK
+ t
SKEW1
. The Latency Timng
applies only at the Empty Boundary (
EF
= LOW).
2. The first word is available the cycle after
EF
goes HIGH, always.
3. Select this mode by setting (
FL
,
RXI
,
WXI
) = (0,0,0), (0,1,1), (1,0,0) or (1,1,1) during Reset.
相關(guān)PDF資料
PDF描述
IDT72835LB CMOS DUAL SyncFIFO DUAL 256 x 18, DUAL 512 x 18, DUAL 1,024 x 18, DUAL 2,048 x 18, and DUAL 4,096 x 18
IDT72835LB10PF CMOS DUAL SyncFIFO DUAL 256 x 18, DUAL 512 x 18, DUAL 1,024 x 18, DUAL 2,048 x 18, and DUAL 4,096 x 18
IDT72835LB10PFI CMOS DUAL SyncFIFO DUAL 256 x 18, DUAL 512 x 18, DUAL 1,024 x 18, DUAL 2,048 x 18, and DUAL 4,096 x 18
IDT72835LB15BG CMOS DUAL SyncFIFO DUAL 256 x 18, DUAL 512 x 18, DUAL 1,024 x 18, DUAL 2,048 x 18, and DUAL 4,096 x 18
IDT72835LB15BGI CMOS DUAL SyncFIFO DUAL 256 x 18, DUAL 512 x 18, DUAL 1,024 x 18, DUAL 2,048 x 18, and DUAL 4,096 x 18
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