IDT72805LB/72815LB/72825LB/72835LB/72845LB CMOS Dual SyncFIFOTM
參數(shù)資料
型號(hào): IDT72815LB25PF8
廠商: IDT, Integrated Device Technology Inc
文件頁(yè)數(shù): 8/26頁(yè)
文件大?。?/td> 0K
描述: IC FIFO SYNC DUAL 512X18 128TQFP
標(biāo)準(zhǔn)包裝: 1,000
系列: 7200
功能: 同步
存儲(chǔ)容量: 9.2K(512 x 18)
數(shù)據(jù)速率: 40MHz
訪問(wèn)時(shí)間: 25ns
電源電壓: 4.5 V ~ 5.5 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 128-LQFP
供應(yīng)商設(shè)備封裝: 128-TQFP(14x20)
包裝: 帶卷 (TR)
其它名稱: 72815LB25PF8
COMMERCIALANDINDUSTRIAL
TEMPERATURERANGES
IDT72805LB/72815LB/72825LB/72835LB/72845LB CMOS Dual SyncFIFOTM
256 x 18, 512 x 18, 1,024 x 18, 2,048 x 18 and 4,096 x 18
16
JANUARY 13, 2009
Figure 15. Half-Full Flag Timing (IDT Standard and FWFT Modes)
Figure 14. Asynchronous Programmable Almost-Full Flag Timing (IDT Standard and FWFT Modes)
NOTES:
1. m =
PAF offset.
2. D = maximum FIFO Depth.
In IDT Standard Mode: D = 256 for the IDT72805, 512 for the IDT72815, 1,024 for the IDT72825, 2,048 for the IDT72835 and 4,096 for the IDT72845.
In FWFT Mode: D = 257 for the IDT72805, 513 for the IDT72815, 1,025 for the IDT72825, 2,049 for the IDT72835 and 4,097 for the IDT72845.
3.
PAF is asserted to LOW on WCLK transition and reset to HIGH on RCLK transition.
4. Select this mode by setting (
FL, RXI, WXI) = (0,0,0), (0,0,1), (0,1,0), (0,1,1) or (1,1,1) during Reset.
NOTES:
1. D = maximum FIFO Depth.
In IDT Standard Mode: D = 256 for the IDT72805, 512 for the IDT72815, 1,024 for the IDT72825, 2,048 for the IDT72835 and 4,096 for the IDT72845.
In FWFT Mode: D = 257 for the IDT72805, 513 for the IDT72815, 1,025 for the IDT72825, 2,049 for the IDT72835 and 4,097 for the IDT72845.
2. For IDT Standard Mode.
3. For FWFT Mode.
4. Select this mode by setting (
FL, RXI, WXI) = (0,0,0), (0,0,1), (0,1,0), (1,0,0), (1,0,1) or (1,1,0) during Reset.
WCLK
tCLKH
tCLKL
tENS
tENH
WEN
PAF
tENS
tPAFA
D - (m + 1) words in FIFO
RCLK
tPAFA
REN
(1)
3139 drw 14
D - m words in FIFO
D - (m + 1) words in FIFO
WCLK
tENS
tENH
WEN
HF
tENS
tHF
RCLK
tHF
REN
3139 drw 15
tCLKL
tCLKH
D/2 words in FIFO(2),
[
+ 1
] words in FIFO(3)
D/2 + 1 words in FIFO
(2),
[
+ 2
] words in FIFO(3)
D-1
2
D/2 words in FIFO(2),
[
+ 1
] words in FIFO(3)
D-1
2
D-1
2
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