參數(shù)資料
型號(hào): IDT72805LB15BGI
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: DRAM
英文描述: CMOS DUAL SyncFIFO DUAL 256 x 18, DUAL 512 x 18, DUAL 1,024 x 18, DUAL 2,048 x 18, and DUAL 4,096 x 18
中文描述: 256 X 18 BI-DIRECTIONAL FIFO, 10 ns, PBGA121
封裝: 16 X 16 MM, PLASTIC, BGA-121
文件頁數(shù): 6/26頁
文件大小: 334K
代理商: IDT72805LB15BGI
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
IDT72805LB/72815LB/72825LB/72835LB/72845LB CMOS Dual SyncFIFO
TM
256 x 18, 512 x 18, 1,024 x 18, 2,048 x 18 and 4,096 x 18
6
AC ELECTRICAL CHARACTERISTICS
(Commercial: V
CC
= 5V ± 10%, T
A
= 0
°
C to +70
°
C; Industrial: V
CC
= 5V
±
10%, TA = -40
°
C + 85
°
C)
Input Pulse Levels
Input Rise/Fall Times
Input Timng Reference Levels
Output Reference Levels
Output Load
GND to 3.0V
3ns
1.5V
1.5V
See Figure 1
AC TEST CONDITIONS
Figure 1. Output Load
*Includes jig and scope capacitances.
Commercial
IDT72805LB10
IDT72815LB10
IDT72825LB10
IDT72835LB10
IDT72845LB10
Mn.
2
10
4.5
4.5
3
0
3
0
10
8
8
0
1
Coml & Ind’l
(1)
IDT72805LB15
IDT72815LB15
IDT72825LB15
IDT72835LB15
IDT72845LB15
Mn.
2
15
6
6
4
1
4
1
15
10
10
0
1
Commercial
IDT72805LB25
IDT72815LB25
IDT72825LB25
IDT72835LB25
IDT72845LB25
Mn.
3
25
10
10
6
1
6
1
25
15
15
0
1
Symbol
f
S
t
A
t
CLK
t
CLKH
t
CLKL
t
DS
t
DH
t
ENS
t
ENH
t
RS
t
RSS
t
RSR
t
RSF
t
OLZ
t
OE
t
OHZ
t
WFF
t
REF
t
PAFA
Parameter
Max.
100
6.5
15
6
6
6.5
6.5
17
Max.
66.7
10
15
8
8
10
10
20
Max.
40
15
25
12
12
15
15
35
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Clock Cycle Frequency
Data Access Time
Clock Cycle Time
Clock HIGH Time
Clock LOW Time
Data Setup Time
Data Hold Time
Enable Setup Time
Enable Hold Time
Reset Pulse Width
(2)
Reset Setup Time
Reset Recovery Time
Reset to Flag and Output Time
Output Enable to Output in Low-Z
(3)
Output Enable to Output Valid
Output Enable to Output in High-Z
(3)
Write Clock to Full Flag
Read Clock to Empty Flag
Clock to Asynchronous Programmable
Almost-Full Flag
Write Clock to Synchronous
Programmable Almost-Full Flag
Clock to Asynchronous Programmable
Almost-Empty Flag
Read Clock to Synchronous
Programmable Almost-Empty Flag
Clock to Half-Full flag
Clock to Expansion Out
Expansion In Pulse Width
Expansion In Setup Time
Skew time between Read Clock &
Write Clock for
FF
/
IR
and
EF
/
OR
Skew time between Read Clock &
Write Clock for
PAE
and
PAF
t
PAFS
8
10
12
ns
t
PAEA
17
20
35
ns
t
PAES
8
10
12
ns
t
HF
t
XO
t
XI
t
XIS
t
SKEW1
3
3
5
17
6.5
6.5
5
6
20
10
10
10
10
35
15
ns
ns
ns
ns
ns
t
SKEW2(4)
12
15
17
ns
3139 drw 03
30pF*
1.1K
5V
D.U.T.
680
NOTES:
1. Industrial Temperature Range Product for the 15ns speed grade is available as a standard device.
2. Pulse widths less than mnimumvalues are not allowed.
3. Values guaranteed by design, not currently tested.
4. t
SKEW2
applies to synchronous
PAE
and synchronous
PAF
only.
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IDT72805LB15PF8 功能描述:IC FIFO SYNC DUAL 256X18 128TQFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K(16K x 18) 數(shù)據(jù)速率:100MHz 訪問時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP(14x14) 包裝:托盤 其它名稱:72271LA10PF
IDT72805LB15PFI 功能描述:IC FIFO SYNC DUAL 256X18 128TQFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K(16K x 18) 數(shù)據(jù)速率:100MHz 訪問時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP(14x14) 包裝:托盤 其它名稱:72271LA10PF
IDT72805LB15PFI8 功能描述:IC FIFO SYNC DUAL 256X18 128TQFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K(16K x 18) 數(shù)據(jù)速率:100MHz 訪問時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP(14x14) 包裝:托盤 其它名稱:72271LA10PF
IDT72805LB25BG 功能描述:IC FIFO SYNC DUAL 256X18 121BGA RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K(16K x 18) 數(shù)據(jù)速率:100MHz 訪問時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP(14x14) 包裝:托盤 其它名稱:72271LA10PF