參數(shù)資料
型號： IDT72801L20PF
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： DRAM
英文描述： DUAL CMOS SyncFIFO
中文描述： 512 X 9 BI-DIRECTIONAL FIFO, PQFP64
封裝： 14 X 14 MM, 1.40 MM HEIGHT, TQFP-64
文件頁數(shù)： 7/21頁
文件大?。?/td> 228K
代理商： IDT72801L20PF
5.15
7
COMMERCIAL TEMPERATURE
72801/72811/72821/72831/72841 DUAL CMOS SyncFIFO
256 x 9, 512 x 9, 1024 x 9, 2048 x 9 and 4096 x 9
LDA
LDB
0
WENA1
WENB1
0
WCLKA
(1)
WCLKB
(1)
OPERATION ON FIFO A
OPERATION ON FIFO B
Empty Offset (LSB)
Empty Offset (MSB)
Full Offset (LSB)
Full Offset (MSB)
0
1
No Operation
1
0
Write Into FIFO
1
1
No Operation
NOTE:
1. The same selection sequence applies to reading from the registers.
RENA1
and
RENA2
(
RENB1
and
RENB2
) are enabled and read is per-
formed on the LOW-to-HIGH transition of RCLKA (RCLKB).
3034 drw 04
Figure 3. Offset Register Formats and Default Values for the A and B FIFOs
If FIFO A (B) is configured to have programmable flags,
when the
WENA1
(
WENB1
) and WENA2/
LDA
(WENB2/
LDB
)
are set LOW, data on the DA (DB) inputs are written into the
Empty (Least Significant Bit) offset register on the first LOW-
to-HIGH transition of the WCLKA (WCLKB). Data are written
into the Empty (Most Significant Bit) offset register on the
second LOW-to-HIGH transition of WCLKA (WCLKB), into
the Full (Least Significant Bit) offset register on the third
transition, and into the Full (Most Significant Bit) offset register
on the fourth transition. The fifth transition of WCLKA (WCLKB)
again writes to the Empty (Least Significant Bit) offset register.
However, writing all offset registers does not have to occur
at one time. One or two offset registers can be written and then
by bringing
LDA
(
LDB
) HIGH, FIFO A (B) is returned to normal
read/write operation. When
LDA
(
LDB
) s set LOW, and
WENA1
(
WENB1
) is LOW, the next offset register in sequence is
written.
The contents of the offset registers can be read on the QA
(QB) outputs when WENA2/
LDA
(WENB2/
LDB
) is set LOW
and both Read Enables
RENA1
,
RENA2
(
RENB1
,
RENB2
) are
set LOW. Data can be read on the LOW-to-HIGH transition of
the read clock RCLKA (RCLKB).
A read and write should not be performed simultaneously
to the offset registers.
Figure 2. Writing to Offset Registers for FIFOs A and B
8
7
0
Empty Offset (LSB) Reg.
Default Value 007H
8
0
Full Offset (LSB) Reg.
Default Value 007H
7
8
0
Empty Offset (LSB)
Default Value 007H
8
0
Full Offset (LSB)
Default Value 007H
72801 - 256 x 9 x 2
72811 - 512 x 9 x 2
7
7
8
0
(MSB)
0
1
0
0
8
7
0
Empty Offset (LSB) Reg.
Default Value 007H
8
0
Full Offset (LSB) Reg.
Default Value 007H
7
8
0
Empty Offset (LSB)
Default Value 007H
8
0
Full Offset (LSB)
Default Value 007H
72831 - 2048 x 9 x 2
72841 - 4096 x 9 x 2
7
7
8
0
8
0
(MSB)
0000
2
(MSB)
000
3
8
0
8
0
(MSB)
0000
2
(MSB)
000
3
8
0
8
8
(MSB)
0
1
8
7
0
Empty Offset (LSB) Reg.
Default Value 007H
8
0
Full Offset (LSB) Reg.
Default Value 007H
7
72821 - 1024 x 9 x 2
8
0
(MSB)
00
1
8
0
(MSB)
00
1
3034 drw 05
相關(guān)PDF資料
PDF描述
IDT72801L25PF DUAL CMOS SyncFIFO
IDT72801L35PF Connector; Leaded Process Compatible:Yes; Peak Reflow Compatible (260 C):Yes RoHS Compliant: Yes
IDT72831L20PF DUAL CMOS SyncFIFO
IDT72801 DUAL CMOS SyncFIFO
IDT72831 DUAL CMOS SyncFIFO
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IDT72801L25PF 功能描述:IC FIFO SYNC DUAL 256X9 64-TQFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:80 系列:7200 功能:同步 存儲容量:18.4K（1K x 18） 數(shù)據(jù)速率:- 訪問時間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（10x10） 包裝:托盤 其它名稱:72225LB10TF
IDT72801L25PF8 功能描述:IC FIFO SYNC DUAL 256X9 64-TQFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:80 系列:7200 功能:同步 存儲容量:18.4K（1K x 18） 數(shù)據(jù)速率:- 訪問時間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（10x10） 包裝:托盤 其它名稱:72225LB10TF
IDT72801L25PFI 功能描述:IC FIFO SYNC DUAL 256X9 64-TQFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問時間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤 其它名稱:72271LA10PF
IDT72801L25PFI8 功能描述:IC FIFO SYNC DUAL 256X9 64-TQFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:80 系列:7200 功能:同步 存儲容量:18.4K（1K x 18） 數(shù)據(jù)速率:- 訪問時間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（10x10） 包裝:托盤 其它名稱:72225LB10TF
IDT72801L25TF 功能描述:IC FIFO SYNC DUAL 256X9 64QFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:80 系列:7200 功能:同步 存儲容量:18.4K（1K x 18） 數(shù)據(jù)速率:- 訪問時間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（10x10） 包裝:托盤 其它名稱:72225LB10TF
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