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參數(shù)資料
| 型號(hào)： | IDT72142L35P |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | CMOS SERIAL-TO-PARALLEL FIFO 2048 x 9 4096 x 9 |
| 中文描述： | 4K X 9 OTHER FIFO, 35 ns, PDIP28 |
| 封裝： | PLASTIC, DIP-28 |
| 文件頁數(shù)： | 12/13頁 |
| 文件大?。?/td> | 137K |
| 代理商： | IDT72142L35P |
5.36
12
IDT72132, IDT72142
CMOS SERIAL-TO-PARALLEL FIFO 2048 x 9 AND 4096 x 9
COMMERCIAL TEMPERATURE RANGES
2.
3.
All other devices must have
FL
in the high state.
The Expansion Out (
XO
) pin and Expansion In (
XI
) pin
of each device must be tied together.
External logic is needed to generate a composite Full
Flag (
FF
) and Empty Flag (
EF
). This requires the
OR-ing of all
EF
s and OR-ing of all
FF
s (i.e., all must be
set to generate the correct composite
(FF
) or
(EF
).
The Retransmit (
RT
) function and Half-Full Flag (
HF
)
are not available in the Depth Expansion mode.
4.
5.
TABLE 2: RESET AND FIRST LOAD TRUTH TABLE —
DEPTH EXPANSION/COMPOUND EXPANSION MODE
Inputs
FL
/
RT
0
Internal Status
Outputs
Mode
RS
0
XI
(1)
Read Pointer
Location Zero
Write Pointer
Location Zero
EF
0
FF
1
Reset-First
Device
Reset all
Other Devices
Read/Write
0
1
(1)
Location Zero
Location Zero
0
1
1
X
(1)
X
X
X
X
NOTES:
1.
XI
is connected to
XO
of the previous device.
2.
RS
= Reset Input,
FL
/
RT
= First Load/Retransmit,
EF
= Empty Flag Ouput,
FF
= Full Flag Output,
XI
= Expansion Input.
2752 tbl 10
Depth Expansion (Daisy Chain) Mode
The IDT72132/42 can be easily adapted to applications
where the requirements are for greater than 2048/4096 words.
Figure 15 demonstrates Depth Expansion using three
IDT72132/42. Any depth can be attained by adding additional
IDT72132/42 operates in the Depth Expansion configuration
when the following conditions are met:
1.
The first device must be designated by grounding the
First Load (
FL
) control input.
Figure 15. An 8K x 8 Serial-In Parallel-Out FIFO
2752 drw 18
SICP
R
Q
0-7
NW
D
7
SI
FIFO #1
IDT72142
SIX
FL
/
RT
XO
SICP
R
Q
0-7
NW
D
7
SI
FIFO #2
IDT72142
SIX
FL
/
RT
XI
V
CC
Q
0-7
R
V
CC
SI
SICP
XI
XO
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT72132L50P | Silver Mica Capacitor; Capacitance:910pF; Capacitance Tolerance:+/- 5%; Series:CDS; Voltage Rating:100VDC; Capacitor Dielectric Material:Mica; Termination:Radial Leaded; Lead Pitch:5.9mm; Leaded Process Compatible:No RoHS Compliant: No |
| IDT72142L50P | Silver Mica Capacitor; Capacitance:100pF; Capacitance Tolerance:+/- 5%; Series:CDV16; Voltage Rating:1000VDC; Capacitor Dielectric Material:Mica; Termination:Radial Leaded; Lead Pitch:5.94mm; Leaded Process Compatible:Yes RoHS Compliant: Yes |
| IDT7216L55C | 16 x 16 PARALLEL CMOS MULTIPLIERS |
| IDT7217L55JB | 16 x 16 PARALLEL CMOS MULTIPLIERS |
| IDT7216L55CB | 16 x 16 PARALLEL CMOS MULTIPLIERS |
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| IDT72156 | 制造商:IDT 功能描述:72156 |
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| IDT7216L55GB | 制造商:Integrated Device Technology Inc 功能描述: |
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| IDT72200L10TP | 功能描述:IC FIFO 200KB SYNC 10NS 28DIP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤 其它名稱:72271LA10PF |
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