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參數資料
| 型號： | IDT7206L20P |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數： | 11/14頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FIFO 8192X18 20NS 28DIP |
| 標準包裝： | 13 |
| 系列： | 7200 |
| 功能： | 異步 |
| 存儲容量： | 144K（16K x 9） |
| 數據速率： | 33.3MHz |
| 訪問時間： | 20ns |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 28-DIP（0.600"，15.24mm） |
| 供應商設備封裝： | 28-PDIP |
| 包裝： | 管件 |
| 其它名稱： | 7206L20P |
6
COMMERCIAL,INDUSTRIALANDMILITARY
TEMPERATURERANGES
IDT7203/7204/7205/7206/7207/7208 CMOS ASYNCHRONOUS FIFO
2,048 x 9, 4,096 x 9, 8,192 x 9, 16,384 x 9, 32,768 x 9 and 65,536 x 9
loaded(seeOperatingModes).TheSingleDeviceModeisinitiatedbygrounding
the Expansion In (XI).
TheIDT7203/7204/7205/7206/7207/7208canbemadetoretransmitdata
when the Retransmit Enable Control (RT) input is pulsed LOW. A retransmit
operationwillsettheinternalreadpointertothefirstlocationandwillnotaffectthe
writepointer. ThestatusoftheFlagswillchangedependingontherelativelocations
of the read and write pointers. Read Enable (R) and Write Enable (W) must be
intheHIGHstateduringretransmit. Thisfeatureisusefulwhenlessthan2,048/
4,096/8,192/16,384/32,768/65,536writesareperformedbetweenresets. The
retransmitfeatureisnotcompatiblewiththeDepthExpansionMode.
EXPANSIONIN(XI)—Thisinputisadual-purposepin. ExpansionIn(XI)
isgroundedtoindicateanoperationinthesingledevicemode. ExpansionIn(XI)
isconnectedtoExpansionOut(XO)ofthepreviousdeviceintheDepthExpansion
or Daisy-Chain Mode.
OUTPUTS:
FULLFLAG
(FF)—TheFullFlag(FF)willgoLOW,inhibitingfurtherwrite
operations,whenthedeviceisfull. IfthereadpointerisnotmovedafterReset(RS),
the Full Flag (FF) will go LOW after 2,048/4,096/8,192/16,384/32,768/65,536
writes.
EMPTYFLAG(EF)—TheEmptyFlag(EF)willgoLOW,inhibitingfurther
readoperations,whenthereadpointerisequaltothewritepointer,indicatingthat
thedeviceisempty.
EXPANSIONOUT/HALF-FULLFLAG(XO/HF)—Thisisadual-purpose
output. Inthesingledevicemode,whenExpansionIn(XI)isgrounded,thisoutput
actsasanindicationofahalf-fullmemory.
Afterhalfofthememoryisfilled,andatthefallingedgeofthenextwriteoperation,
theHalf-FullFlag(HF)willbesettoLOWandwillremainsetuntilthedifference
betweenthewritepointerandreadpointerislessthanorequaltoonehalfofthe
totalmemoryofthedevice. TheHalf-FullFlag(HF)isthenresetbytherisingedge
ofthereadoperation.
IntheDepthExpansionMode,ExpansionIn(XI)isconnectedtoExpansion
Out (XO)ofthepreviousdevice. Thisoutputactsasasignaltothenextdevice
intheDaisyChainbyprovidingapulsetothenextdevicewhenthepreviousdevice
reachesthelastlocationofmemory. TherewillbeanXOpulsewhentheWrite
pointerreachesthelastlocationofmemory,andanadditionalXOpulsewhenthe
Readpointerreachesthelastlocationofmemory.
DATA OUTPUTS (Q0-Q8) — Q0-Q8 are data outputs for 9-bit wide data.
Theseoutputsareinahigh-impedanceconditionwheneverRead(R)isinaHIGH
state.
SIGNAL DESCRIPTIONS
INPUTS:
DATA IN (D0–D8)
— Data inputs for 9-bit wide data.
CONTROLS:
RESET ( RS ) — Reset is accomplished whenever the Reset (RS) input is
takentoaLOWstate. Duringreset,bothinternalreadandwritepointersareset
tothefirstlocation.Aresetisrequiredafterpower-upbeforeawriteoperationcan
take place. Both the Read Enable (R) and Write Enable (W) inputs must
beintheHIGHstateduringthewindowshowninFigure2(i.e.tRSSbefore
the rising edge of RS) and should not change until tRSR after the rising
edge of RS.
WRITE ENABLE ( W ) — A write cycle is initiated on the falling edge of this
inputiftheFullFlag(FF)isnotset.Dataset-upandholdtimesmustbeadhered-
to,withrespecttotherisingedgeoftheWriteEnable(W).DataisstoredintheRAM
array sequentially and independently of any on-going read operation.
Afterhalfofthememoryisfilled,andatthefallingedgeofthenextwriteoperation,
theHalf-FullFlag(HF)willbesettoLOW,andwillremainsetuntilthedifference
betweenthewritepointerandreadpointerisless-thanorequaltoone-halfofthe
totalmemoryofthedevice.TheHalf-FullFlag(HF)isthenresetbytherisingedge
ofthereadoperation.
Topreventdataoverflow,theFullFlag(FF)willgoLOWonthefallingedge
ofthelastwritesignal,whichinhibitsfurtherwriteoperations. Uponthecompletion
of a valid read operation, the Full Flag (FF) will go HIGH after tRFF, allowing a
newvalidwritetobegin.WhentheFIFOisfull,theinternalwritepointerisblocked
from W,soexternalchangesinW willnotaffecttheFIFOwhenitisfull.
READENABLE(R)—A readcycleisinitiatedonthefallingedgeoftheRead
Enable (R), provided the Empty Flag (EF) is not set. The data is accessed on
Enable (R) goes HIGH, the Data Outputs (Q0 through Q8) will return to a high-
impedanceconditionuntilthenextReadoperation. Whenallthedatahasbeen
read from the FIFO, the Empty Flag (EF) will go LOW, allowing the “final” read
cyclebutinhibitingfurtherreadoperations,withthedataoutputsremaininginahigh-
impedancestate.Onceavalidwriteoperationhasbeenaccomplished,theEmpty
Flag (EF) will go HIGH after tWEF and a valid Read can then begin. When the
FIFOisempty,theinternalreadpointerisblockedfromRsoexternalchangeswill
notaffecttheFIFOwhenitisempty.
FIRST LOAD/RETRANSMIT ( FL/RT
) — This is a dual-purpose input. In
theDepthExpansionMode,thispinisgroundedtoindicatethatitisthefirstdevice
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| IDT7206L20TP | 功能描述:IC FIFO 8192X18 20NS 28DIP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標準包裝:90 系列:7200 功能:同步 存儲容量:288K（16K x 18） 數據速率:100MHz 訪問時間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應商設備封裝:64-TQFP（14x14） 包裝:托盤 其它名稱:72271LA10PF |
| IDT7206L25J | 功能描述:IC FIFO 8192X18 25NS 32PLCC RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標準包裝:90 系列:7200 功能:同步 存儲容量:288K（16K x 18） 數據速率:100MHz 訪問時間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應商設備封裝:64-TQFP（14x14） 包裝:托盤 其它名稱:72271LA10PF |
| IDT7206L25J8 | 功能描述:IC FIFO 8192X18 25NS 32PLCC RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標準包裝:80 系列:7200 功能:同步 存儲容量:18.4K（1K x 18） 數據速率:- 訪問時間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應商設備封裝:64-TQFP（10x10） 包裝:托盤 其它名稱:72225LB10TF |
| IDT7206L25JI | 功能描述:IC FIFO 8192X18 25NS 32PLCC RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標準包裝:90 系列:74ABT 功能:同步，雙端口 存儲容量:4.6K（64 x 36 x2） 數據速率:67MHz 訪問時間:- 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:120-LQFP 裸露焊盤 供應商設備封裝:120-HLQFP（14x14） 包裝:托盤 產品目錄頁面:1005 (CN2011-ZH PDF) 其它名稱:296-3984 |
| IDT7206L25JI8 | 功能描述:IC FIFO 8192X18 25NS 32PLCC RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標準包裝:80 系列:7200 功能:同步 存儲容量:18.4K（1K x 18） 數據速率:- 訪問時間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應商設備封裝:64-TQFP（10x10） 包裝:托盤 其它名稱:72225LB10TF |
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