參數(shù)資料
型號(hào)： IDT71V3557SA85PF
廠商： Integrated Device Technology, Inc.
元件分類： 通用總線功能
英文描述： 128K x 36, 256K x 18, 3.3V Synchronous ZBT SRAMs 3.3V I/O, Burst Counter, Flow-Through Outputs
中文描述： 128K的× 36，256 × 18，3.3V的同步ZBT SRAM的3.3V的I / O的脈沖計(jì)數(shù)器，流量，通過輸出
文件頁數(shù)： 9/28頁
文件大小： 996K
代理商： IDT71V3557SA85PF
6.42
IDT71V3557, IDT71V3559, 128K x 36, 256K x 18, 3.3V Synchronous SRAMs with
ZBT Feature, 3.3V I/O, Burst Counter, and Flow-Through Outputs Commercial and Industrial Temperature Ranges
Synchronous Truth Table
(1)
CEN
R/
W
CE
1
,
CE
2
(5)
USED
9
Interleaved Burst Sequence Table (
LBO
=V
DD
)
Partial Truth Table for Writes
(1)
NOTES:
1. L = V
IL
, H = V
IH
, X = Dont Care.
2. When ADV/
LD
signal is sampled high, the internal burst counter is incremented. The R/
W
signal is ignored when the counter is advanced. Therefore the nature of
the burst cycle (Read or Write) is determned by the status of the R/
W
signal when the first address is loaded at the beginning of the burst cycle.
3. Deselect cycle is initiated when either (
CE
1
, or
CE
2
is sampled high or CE
2
is sampled low) and ADV/
LD
is sampled low at rising edge of clock. The data bus will
tri-state one cycle after deselect is initiated.
4. When
CEN
is sampled high at the rising edge of clock, that clock edge is blocked frompropogating through the part. The state of all the internal registers and the I/
Os remains unchanged.
5. To select the chip requires
CE
1
= L,
CE
2
= L and CE
2
= H on these chip enable pins. The chip is deselected if any one of the chip enables is false.
6. Device Outputs are ensured to be in High-Z during device power-up.
7. Q - data read fromthe device, D - data written to the device.
NOTES:
1. L = V
IL
, H = V
IH
, X = Dont Care.
2. Multiple bytes may be selected during the same cycle.
3. N/A for x18 configuration.
NOTE:
1. Upon completion of the Burst sequence the counter wraps around to its initial state and continues counting.
ADV/
LD
BW
x
ADDRESS
PREVIOUS CYCLE
CURRENT CYCLE
I/O
(One cycle later)
L
L
L
L
Valid
External
X
LOAD WRITE
D
(7)
L
H
L
L
X
External
X
LOAD READ
Q
(7)
L
X
X
H
Valid
Internal
LOAD WRITE /
BURST WRITE
BURST WRITE
(Advance burst counter)
(2)
D
(7)
L
X
X
H
X
Internal
LOAD READ /
BURST READ
BURST READ
(Advance burst counter)
(2)
Q
(7)
L
X
H
L
X
X
X
DESELECT or STOP
(3)
HIZ
L
X
X
H
X
X
DESELECT / NOOP
NOOP
HIZ
H
X
X
X
X
X
X
SUSPEND
(4)
Previous Value
5282 tbl 08
Sequence 1
Sequence 2
Sequence 3
Sequence 4
A1
A0
A1
A0
A1
A0
A1
A0
First Address
0
0
0
1
1
0
1
1
Second Address
0
1
0
0
1
1
1
0
Third Address
1
0
1
1
0
0
0
1
Fourth Address
(1)
1
1
1
0
0
1
0
0
5282 tbl 10
OPERATION
R/
W
BW
1
BW
2
BW
3
(3)
BW
4
(3)
READ
H
X
X
X
X
WRITE ALL BYTES
L
L
L
L
L
WRITE BYTE 1 (I/O[0:7], I/O
P1
)
(2)
L
L
H
H
H
WRITE BYTE 2 (I/O[8:15], I/O
P2
)
(2)
L
H
L
H
H
WRITE BYTE 3 (I/O[16:23], I/O
P3
)
(2,3)
L
H
H
L
H
WRITE BYTE 4 (I/O[24:31], I/O
P4
)
(2,3)
L
H
H
H
L
NO WRITE
L
H
H
H
H
5282 tbl 09
相關(guān)PDF資料
PDF描述
IDT71V3557SA85PFI Ceramic Conformally Coated / Radial 'Standard & High Voltage Golden Max'; Capacitance [nom]: 0.68uF; Working Voltage (Vdc)[max]: 50V; Capacitance Tolerance: +/-20%; Dielectric: Multilayer Ceramic, Conformally Coated; Temperature Coefficient: Z5U; Lead Style: Radial Leaded; Lead Dimensions: 0.200" Lead Spacing; Body Dimensions: 0.300" x 0.390" x 0.200"; Container: Bag; Qty per Container: 250
IDT71V3559SA80BQI 128K x 36, 256K x 18, 3.3V Synchronous ZBT SRAMs 3.3V I/O, Burst Counter, Flow-Through Outputs
IDT71V3559SA85BG 128K x 36, 256K x 18, 3.3V Synchronous ZBT SRAMs 3.3V I/O, Burst Counter, Flow-Through Outputs
IDT71V3559SA85BGI Ceramic Conformally Coated / Radial 'Standard & High Voltage Golden Max'; Capacitance [nom]: 82pF; Working Voltage (Vdc)[max]: 500V; Capacitance Tolerance: +/-10%; Dielectric: Multilayer Ceramic, Conformally Coated; Temperature Coefficient: X7R; Lead Style: Radial Leaded; Lead Dimensions: 0.200" Lead Spacing; Body Dimensions: 0.300" x 0.390" x 0.200"; Container: Bag; Qty per Container: 250
IDT71V3559SA85BQ 128K x 36, 256K x 18, 3.3V Synchronous ZBT SRAMs 3.3V I/O, Burst Counter, Flow-Through Outputs
相關(guān)代理商/技術(shù)參數(shù)
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