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參數(shù)資料
| 型號(hào)： | IDT7198L |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | Current-Mode PWM Controller 8-SOIC -40 to 85 |
| 中文描述： | 64K的的CMOS靜態(tài)RAM（16K的× 4位）新增芯片選擇和輸出控制 |
| 文件頁數(shù)： | 6/8頁 |
| 文件大小： | 80K |
| 代理商： | IDT7198L |
6.4
6
IDT7198S/L
CMOS STATIC RAM 64K (16K x 4-BIT) Added Chip Select and Output Enable Controls
MILITARY TEMPERATURE RANGE
TIMING WAVEFORM OF READ CYCLE NO. 2
(1, 2, 4)
ADDRESS
DATA
OUT
2985 drw 08
t
RC
t
AA
t
OH
t
OH
DATA VALID
PREVIOUS DATA VALID
TIMING WAVEFORM OF READ CYCLE NO. 3
(1, 3, 4)
DATA
OUT
CS
1,2
I
CC
I
SB
V
CC
SUPPLY
CURRENT
2985 drw 09
t
ACS1, 2
(5)
t
CLZ1, 2
(5)
t
CHZ1, 2
t
PD
t
PU
DATA VALID
NOTES:
1.
WE
is HIGH for Read cycle.
2. Device is continuously selected,
CS
1
is LOW,
CS
2
is LOW.
3. Address valid prior to or coincident with
CS
1
and or
CS
2
transition LOW.
4.
OE
is LOW.
5. Transition is measured
±
200mV from steady state voltage.
AC ELECTRICAL CHARACTERISTICS
(V
CC
= 5.0V
±
10%, All Temperature Ranges)
7198S20
7198L20
Symbol
Parameter
Min.
Write Cycle
t
WC
Write Cycle Time
17
t
CW1,2(1)
Chip Select to End-of-Write
17
t
AW
Address Valid to End-of-Write
17
t
AS
Address Set-up Time
0
t
WP
Write Pulse Width
17
t
WR1,2
Write Recovery Time
0
t
WHZ(2)
Write Enable to Output in High-Z
—
t
DW
Data Valid to End-of-Write
10
t
DH
Data Hold Time
0
t
OW(2)
Output Active from End-of-Write
5
7198S25
7198L25
7198S35/45
7198L35/45
7198S55
7198L55
7198S70
7198L70
Min. Max.
7198S85
7198L85
Min. Max. Unit
Max. Min. Max. Min.
Max. Min. Max.
—
—
—
—
—
—
5/6
—
—
—
20
20
20
0
20
0
—
13
0
5
—
—
—
—
—
—
7
—
—
—
30/40
25/35
25/35
0
25/35
0
—
15/20
0
5
—
—
—
—
—
—
50
50
50
0
50
0
—
25
0
5
—
—
—
—
—
—
25
—
—
—
60
60
60
0
60
0
—
30
0
5
—
—
—
—
—
—
30
—
—
—
75
75
75
0
75
0
—
35
0
5
—
—
—
—
—
—
40
—
—
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
10/15
—
—
—
NOTES:
1. Both chip selects must be active low for the device to be selected.
2. This parameter is guaranteed by device characterization but is not production tested.
2985 tbl 12
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