參數(shù)資料
型號(hào): IDT71342LA20PF
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: DRAM
英文描述: HIGH-SPEED 4K x 8 DUAL-PORT STATIC RAM WITH SEMAPHORE
中文描述: 4K X 8 DUAL-PORT SRAM, 20 ns, PQFP64
封裝: PLASTIC, TQFP-64
文件頁數(shù): 1/13頁
文件大?。?/td> 144K
代理商: IDT71342LA20PF
Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
OCTOBER 1996
1996 Integrated Device Technology, Inc.
DSC-2721/4
1
IDT71342SA/LA
HIGH-SPEED
4K x 8 DUAL-PORT
STATIC RAM WITH SEMAPHORE
FEATURES:
High-speed access
— Commercial: 20/25/35/45/55/70ns (max.)
Low-power operation
— IDT71342SA
Active: 500mW (typ.)
Standby: 5mW (typ.)
— IDT71342LA
Active: 500mW (typ.)
Standby: 1mW (typ.)
Fully asynchronous operation from either port
Full on-chip hardware support of semaphore signalling
between ports
Battery backup operation—2V data retention
TTL-compatible; single 5V (
±
10%) power supply
Available in plastic packages
Industrial temperature range (–40
°
C to +85
°
C) is avail-
able, tested to military electrical specifications
DESCRIPTION:
The IDT71342 is an extremely high-speed 4K x 8 Dual-Port
Static RAM with full on-chip hardware support of semaphore
signalling between the two ports.
The IDT71342 provides two independent ports with separate
control, address, and I/O pins that permit independent,
asynchronous access for reads or writes to any location in
memory. To assist in arbitrating between ports, a fully
independent semaphore logic block is provided. This block
contains unassigned flags which can be accessed by either
side; however, only one side can control the flag at any time.
An automatic power down feature, controlled by
CE
and
SEM
,
permits the on-chip circuitry of each port to enter a very low
standby power mode (both
CE
and
SEM
High).
Fabricated using IDT’s CMOS high-performance
technology, this device typically operates on only 500mW of
power. Low-power (LA) versions offer battery backup data
retention capability, with each port typically consuming 200
μ
W
from a 2V battery. The device is packaged in either a 64-pin
TQFP, thin quad plastic flatpack, or a 52-pin PLCC.
FUNCTIONAL BLOCK DIAGRAM
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
6.05
For latest information contact IDT’s web site at www.idt.com or fax-on-demand at 408-492-8391.
2721 drw 01
COLUMN
I/O
COLUMN
I/O
MEMORY
ARRAY
LEFT SIDE
ADDRESS
DECODE
LOGIC
RIGHT SIDE
ADDRESS
DECODE
LOGIC
CE
R
OE
R
I/O
0R
- I/O
7R
A
0R
- A
11R
CE
L
OE
L
A
0L
- A
11L
I/O
0L
- I/O
7L
SEMAPHORE
LOGIC
SEM
R
SEM
L
R/
W
L
R/
W
R
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