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參數(shù)資料
| 型號： | IDT7130LA20JB |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | Dual UART with 16-Byte FIFOs & Parallel Port 68-PLCC 0 to 70 |
| 中文描述： | 高速每1000 × 8雙端口靜態(tài)RAM |
| 文件頁數(shù)： | 1/14頁 |
| 文件大小： | 218K |
| 代理商： | IDT7130LA20JB |
Integrated Device Technology, Inc.
HIGH-SPEED
1K x 8 DUAL-PORT
STATIC RAM
IDT7130SA/LA
IDT7140SA/LA
FEATURES
High-speed access
—Military: 25/35/55/100ns (max.)
—Commercial: 25/35/55/100ns (max.)
—Commercial: 20ns 7130 in PLCC and TQFP
Low-power operation
—IDT7130/IDT7140SA
—
Active: 550mW (typ.)
—
Standby: 5mW (typ.)
—IDT7130/IDT7140LA
—
Active: 550mW (typ.)
—
Standby: 1mW (typ.)
MASTER IDT7130 easily expands data bus width to
16-or-more-bits using SLAVE IDT7140
On-chip port arbitration logic (IDT7130 Only)
BUSY
output flag on IDT7130;
BUSY
input on IDT7140
Interrupt flags for port-to-port communication
Fully asynchronous operation from either port
Battery backup operation–2V data retention (LA only)
TTL-compatible, single 5V
±
10% power supply
Military product compliant to MIL-STD-883, Class B
Standard Military Drawing #5962-86875
Industrial temperature range (–40
°
C to +85
°
C) is avail-
able, tested to military electrical specifications
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DESCRIPTION
The IDT7130/IDT7140 are high-speed 1K x 8 Dual-Port
Static RAMs. The IDT7130 is designed to be used as a
stand-alone 8-bit Dual-Port RAM or as a "MASTER" Dual-
Port RAM together with the IDT7140 "SLAVE" Dual-Port in
16-bit-or-more word width systems. Using the IDT MAS-
TER/SLAVE Dual-Port RAM approach in 16-or-more-bit
memory system applications results in full-speed, error-free
operation without the need for additional discrete logic.
Both devices provide two independent ports with sepa-
rate control, address, and I/O pins that permit independent
asynchronous access for reads or writes to any location in
memory. An automatic power down feature, controlled by
CE
, permits the on chip circuitry of each port to enter a very
low standby power mode.
Fabricated using IDT's CMOS high-performance tech-
nology, these devices typically operate on only 550mW of
power. Low-power (LA) versions offer battery backup data
retention capability, with each Dual-Port typically consum-
ing 200
μ
W from a 2V battery.
The IDT7130/IDT7140 devices are packaged in 48-pin
sidebraze or plastic DIPs, LCCs, or flatpacks, 52-pin PLCC,
and 64-pin TQFP and STQFP. Military grade product is
manufactured in compliance with the latest revision of MIL-
STD-883, Class B, making it ideally suited to military tem-
perature applications demanding the highest level of per-
formance and reliability.
FUNCTIONAL BLOCK DIAGRAM
1
OCTOBER 1996
1996 Integrated Device Technology, Inc.
DSC-2689/7
I/O
Control
Address
Decoder
MEMORY
ARRAY
ARBITRATION
and
INTERRUPT
LOGIC
Address
Decoder
I/O
Control
R/
W
L
CE
L
OE
L
BUSY
L
A
9L
A
0L
2689 drw 01
I/O
0L
- I/O
7L
CE
L
OE
L
R/
W
L
INT
L
BUSY
R
I/O
0R
-I/O
7R
A
9R
A
0R
INT
R
CE
R
OE
R
R/
W
R
(2)
(1,2)
(1,2)
(2)
R/
W
R
CE
R
OE
R
10
10
NOTES:
1. IDT7130 (MASTER):
BUSY
is open
drain output and requires pullup
resistor of 270
.
IDT7140 (SLAVE):
BUSY
is input.
2. Open drain output: requires pullup
resistor of 270
.
For latest information contact IDT’s web site at www.idt.com or fax-on-demand at 408-492-8391.
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