參數(shù)資料
型號(hào): IDT71124S20YI
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: DRAM
英文描述: CMOS Static RAM 1 Meg (128K x 8-Bit) Revolutionary Pinout
中文描述: 128K X 8 STANDARD SRAM, 20 ns, PDSO32
封裝: 0.400 INCH, PLASTIC, SOJ-32
文件頁數(shù): 1/8頁
文件大?。?/td> 83K
代理商: IDT71124S20YI
FEBRUARY
2001
DSC-3514/10
1
2000 Integrated Device Technology, Inc.
Features
N
128K x 8 advanced high-speed CMOS static RAM
N
JEDEC revolutionary pinout (center power/GND) for
reduced noise.
N
Equal access and cycle times
– Commercial and Industrial: 12/15/20ns
N
One Chip Select plus one Output Enable pin
N
Bidirectional inputs and outputs directly TTL-compatible
N
Low power consumption via chip deselect
N
Available in a 32-pin 400 mil Plastic SOJ.
Functional Block Diagram
Description
The IDT71124 is a 1,048,576-bit high-speed static RAMorga-
nized as 128K x 8. It is fabricated using IDT’s high-performance,
high-reliability CMOS technology. This state-of-the-art technology,
combined with innovative circuit design techniques, provides a cost-
effective solution for high-speed memory needs. The JEDEC
centerpower/GND pinout reduces noise generation and improves
systemperformance.
The IDT71124 has an output enable pin which operates as fast
as 6ns, with address access times as fast as 12ns available. All
bidirectional inputs and outputs of the IDT71124 are TTL-compatible
and operation is froma single 5V supply. Fully static asynchronous
circuitry is used; no clocks or refreshes are required for operation.
The IDT71124 is packaged in a 32-pin 400 ml Plastic SOJ.
ADDRESS
DECODER
1,048,576-BIT
MEMORY ARRAY
I/O CONTROL
A
0
A
16
3514 drw 01
8
8
I/O
0
- I/O
7
8
CONTROL
LOGIC
WE
OE
CS
,
CMOS Static RAM
1 Meg (128K x 8-Bit)
Revolutionary Pinout
IDT71124
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