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| 型號(hào)： | IDT70V07S25GI |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | HIGH-SPEED 3.3V 32K x 8 DUAL-PORT STATIC RAM |
| 中文描述： | 32K X 8 DUAL-PORT SRAM, 25 ns, CPGA68 |
| 封裝： | 1.180 X 1.180 INCH, 0.160 INCH HEIGHT, PGA-68 |
| 文件頁(yè)數(shù)： | 14/18頁(yè) |
| 文件大小： | 174K |
| 代理商： | IDT70V07S25GI |
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IDT70V07S/L
High-Speed 32K x 8 Dual-Port Static RAM Industrial and Commercial Temperature Ranges
Truth Table III — Interrupt Flag
(1)
Left Port
14
Truth Table IV — Address
BUSY
Arbitration
Inputs
NOTES:
1.
Pins
BUSY
L
and
BUSY
R
are both outputs when the part is configured as a master. Both are inputs when configured as a slave.
BUSY
outputs on the IDT70V07 are push-
pull, not open drain outputs. On slaves the
BUSY
input internally inhibits writes.
"L" if the inputs to the opposite port were stable prior to the address and enable inputs of this port. "H" if the inputs to the opposite port became stable after the address and
enable inputs of this port. If t
APS
is not met, either
BUSY
L
or
BUSY
R
= LOW will result.
BUSY
L
and
BUSY
R
outputs can not be LOW simultaneously.
Writes to the left port are internally ignored when
BUSY
L
outputs are driving LOW regardless of actual logic level on the pin. Writes to the right port are internally ignored when
BUSY
R
outputs are driving LOW regardless of actual logic level on the pin.
2.
3.
Truth Table V — Example of Semaphore Procurement Sequence
(1,2,3)
Functions
D
0
- D
7
Left
D
0
- D
7
Right
NOTES:
1.
2.
3.
This table denotes a sequence of events for only one of the eight semaphores on the IDT70V07.
There are eight semaphore flags written to via I/O
0
and read fromall I/O's (I/O
0
- I/O
7
). These eight semaphores are addressed by A
0
-A
2
.
CE
= V
IH
,
SEM
= V
IL
to access the semaphores. Refer to the Semaphore Read/Write Control Truth Table.
NOTES:
1.
2.
3.
Assumes
BUSY
L
=
BUSY
R
=V
IH
.
If
BUSY
L
= V
IL
, then no change.
If
BUSY
R
= V
IL
, then no change.
Right Port
Function
R/
W
L
CE
L
OE
L
A
14L
-A
0L
INT
L
R/
W
R
CE
R
OE
R
A
14R
-A
0R
INT
R
L
L
X
7FFF
X
X
X
X
X
L
(2)
Set Right
INT
R
Flag
X
X
X
X
X
X
L
L
7FFF
H
(3)
Reset Right
INT
R
Flag
X
X
X
X
L
(3)
L
L
X
7FFE
X
Set Left
INT
L
Flag
X
L
L
7FFE
H
(2)
X
X
X
X
X
Reset Left
INT
L
Flag
2943 tbl 15
Outputs
Function
CE
L
CE
R
A
0L
-A
14L
A
0R
-A
14R
BUSY
L
(1)
BUSY
R
(1)
X
X
NO MATCH
H
H
Normal
H
X
MATCH
H
H
Normal
X
H
MATCH
H
H
Normal
L
L
MATCH
(2)
(2)
Write Inhibit
(3)
2943 tbl 16
Status
No Action
1
1
Semaphore free
Left Port Writes "0" to Semaphore
0
1
Left port has semaphore token
Right Port Writes "0" to Semaphore
0
1
No change. Right side has no write access to semaphore
Left Port Writes "1" to Semaphore
1
0
Right port obtains semaphore token
Left Port Writes "0" to Semaphore
1
0
No change. Left port has no write access to semaphore
Right Port Writes "1" to Semaphore
0
1
Left port obtains semaphore token
Left Port Writes "1" to Semaphore
1
1
Semaphore free
Right Port Writes "0" to Semaphore
1
0
Right port has semaphore token
Right Port Writes "1" to Semaphore
1
1
Semaphore free
Left Port Writes "0" to Semaphore
0
1
Left port has semaphore token
Left Port Writes "1" to Semaphore
1
1
Semaphore free
2943 tbl 17
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