參數資料
型號: IDT70825L35PFB
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: DRAM
英文描述: HIGH-SPEED 8K x 16 SEQUENTIAL ACCESS RANDOM ACCESS MEMORY (SARAM⑩)
中文描述: 8K X 16 STANDARD SRAM, 35 ns, PQFP80
封裝: TQFP-80
文件頁數: 1/21頁
文件大?。?/td> 319K
代理商: IDT70825L35PFB
Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
OCTOBER 1996
1996 Integrated Device Technology, Inc.
DSC-3016/6
HIGH-SPEED 8K x 16
SEQUENTIAL ACCESS
RANDOM ACCESS MEMORY (SARAM)
FEATURES:
8K x 16 Sequential Access Random Access Memory
(SARAM
)
- Sequential Access from one port and standard Random
Access from the other port
- Separate upper-byte and lower-byte control of the
Random Access Port
High-speed operation
- 20ns t
AA
for random access port
- 20ns t
CD
for sequential port
- 25ns clock cycle time
Architecture based on Dual-Port RAM cells
Electrostatic discharge > 2001V, Class II
Compatible with Intel BMIC and 82430 PCI Set
Width and Depth Expandable
Sequential side
- Address based flags for buffer control
- Pointer logic supports two internal buffers
Battery backup operation—2V data retention
TTL-compatible, single 5V (
±
10%) power supply
Available in 80-pin TQFP and 84-pin PGA
Military product compliant to MIL-STD-883.
Industrial temperature range (–40
°
C to +85
°
C) is available,
tested to military electrical specifications.
FUNCTIONAL BLOCK DIAGRAM
DESCRIPTION:
The IDT70825 is a high-speed 8K x 16-bit Sequential
Access Random Access Memory (SARAM). The SARAM
offers a single-chip solution to buffer data sequentially on one
port, and be accessed randomly (asynchronously) through
the other port. The device has a Dual-Port RAM based
architecture with a standard SRAM interface for the random
(asynchronous) access port, and a clocked interface with
counter sequencing for the sequential (synchronous) access
port.
Fabricated using CMOS high-performance technology,
this memory device typically operates on less than 900mW of
power at maximum high-speed clock-to-data and Random
Access. An automatic power down feature, controlled by
CE
,
permits the on-chip circuitry of each port to enter a very low
standby power mode.
The IDT70825 is packaged in a 80-pin Thin Plastic Quad
Flatpack (TQFP) or 84-pin Ceramic Pin Grid Array (PGA).
Military grade product is manufactured in compliance with the
latest revision of MIL-STD-883, Class B, making it ideally
suited to military temperature applications demanding the
highest level of performance and reliability.
IDT70825S
/
L
The IDT logo is a registered trademark and SARAM is a trademark of Integrated Device Technology, Inc.
6.31
1
Random
Access
Port
Controls
Sequential
Access
Port
Controls
8K X 16
Memory
Array
Data
L
Data
R
Addr
L
Addr
R
I/O0-15
SI/O0-15
Pointer/
Counter
13
Start Address for Buffer #1
End Address for Buffer #1
Start Address for Buffer #2
End Address for Buffer #2
Flow Control Buffer
Flag Status
1
2
13
13
13
16
13
13
RST
COMPARATOR
A
0-12
13
R/
LSB
MSB
16
SCLK
2
SR/
1
16
13
3016 drw 01
Reg.
For latest information contact IDT’s web site at www.idt.com or fax-on-demand at 408-492-8391.
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