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    參數(shù)資料
    型號: IDT7052L30GB
    英文描述: Quad-Port SRAM
    中文描述: 四端口SRAM
    文件頁數(shù): 14/15頁
    文件大?。?/td> 190K
    代理商: IDT7052L30GB
    6.42
    IDT70V9379L
    High-Speed 32K x 18 Dual-Port Synchronous Pipelined Static RAM
    Industrial and Commercial Temperature Ranges
    8
    Timing Waveform of Read Cycle for Flow-Through Output
    (FT/PIPE"X" = VIL)(3,7)
    Timing Waveform of Read Cycle for Pipelined Operation
    (FT/PIPE"X" = VIH)(3,7)
    An
    An + 1
    An + 2
    An + 3
    tCYC1
    tCH1
    tCL1
    R/W
    ADDRESS
    DATAOUT
    CE0
    CLK
    OE
    tSC
    tHC
    tCD1
    tCKLZ
    Qn
    Qn + 1
    Qn + 2
    tOHZ
    tOLZ
    tOE
    tCKHZ
    4857 drw 06
    (1)
    (2)
    CE1
    UB, LB
    (4)
    tSB
    tHB
    tSW
    tHW
    tSA
    tHA
    tDC
    (5)
    tSC
    tHC
    tSB
    tHB
    An
    An + 1
    An + 2
    An + 3
    tCYC2
    tCH2
    tCL2
    R/W
    ADDRESS
    CE0
    CLK
    CE1
    UB, LB
    (4)
    DATAOUT
    OE
    tCD2
    tCKLZ
    Qn
    Qn + 1
    Qn + 2
    tOHZ
    tOLZ
    tOE
    4857 drw 07
    (1)
    (2)
    tSC
    tHC
    tSB
    tHB
    tSW
    tHW
    tSA
    tHA
    tDC
    tSC
    tHC
    tSB
    tHB
    (5)
    (1 Latency)
    (6)
    NOTES:
    1. Transition is measured 0mV from Low or High-impedance voltage with the Output Test Load (Figure 2).
    2.
    OE is asynchronously controlled; all other inputs are synchronous to the rising clock edge.
    3.
    ADS = VIL, CNTEN and CNTRST = VIH.
    4. The output is disabled (High-Impedance state) by
    CE0 = VIH, CE1 = VIL, UB = VIH, or LB = VIH following the next rising edge of the clock. Refer to Truth Table 1.
    5. Addresses do not have to be accessed sequentially since ADS = VIL constantly loads the address on the rising edge of the CLK; numbers
    are for reference use only.
    6. If
    UB or LB was HIGH, then the Upper Byte and/or Lower Byte of DATAOUT for Qn + 2 would be disabled (High-Impedance state).
    7. "X' here denotes Left or Right port. The diagram is with respect to that port.
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