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參數(shù)資料
| 型號： | IDT7015L35PFI |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM |
| 中文描述： | 高速8K的× 9雙端口靜態(tài)RAM |
| 文件頁數(shù)： | 7/20頁 |
| 文件大?。?/td> | 178K |
| 代理商： | IDT7015L35PFI |
6.42
IDT7015S/L
High-Speed 8K x 9 Dual-Port Static RAM Military, Industrial and Commercial Temperature Ranges
AC Elec tric al Charac teristic s Over the
Operating Temperature and S upply Voltage Range
(4)
7
APRIL 04, 2006
NOTES:
1. Transition is measured 0mV fromLow- or High-impedance voltage with load (Figures 1 and 2).
2. This parameter is guaranteed by device characterization but not tested.
3. To access RAM
CE
= V
IL
and
SEM
= V
IH
. To access semaphore,
CE
= V
IH
and
SEM
= V
IL
.
4. 'X' in part numbers indicates power rating (S or L).
7015X12
Coml Only
7015X15
Com'l Only
7015X17
Com'l Only
Unit
Symbol
Parameter
Mn.
Max.
Mn.
Max.
Mn.
Max.
READ CYCLE
t
RC
Read Cycle Time
12
____
15
____
17
____
ns
t
AA
Address Access Time
____
12
____
15
____
17
ns
t
ACE
Chip Enable Access Time
(3)
____
12
____
15
____
17
ns
t
AOE
Output Enable Access Time
____
8
____
10
____
10
ns
t
OH
Output Hold fromAddress Change
3
____
3
____
3
____
ns
t
LZ
Output Low-Z Time
(1,2)
3
____
3
____
3
____
ns
t
HZ
Output High-Z Time
(1,2)
____
10
____
10
____
10
ns
t
PU
Chip Enable to Power Up Time
(2)
0
____
0
____
0
____
ns
t
PD
Chip Disable to Power Down Time
(2)
____
12
____
15
____
17
ns
t
SOP
Semaphore Flag Update Pulse (
OE
or
SEM
)
10
____
10
____
10
____
ns
t
SAA
Semaphore Address Access Time
____
12
____
15
____
17
ns
2954 tbl 12a
7015X20
Com'l. Ind
& Mlitary
7015X25
Com'l &
Mlitary
7015X35
Com'l &
Mlitary
Unit
Symbol
Parameter
Mn.
Max.
Mn.
Max.
Mn.
Max.
READ CYCLE
t
RC
Read Cycle Time
20
____
25
____
35
____
ns
t
AA
Address Access Time
____
20
____
25
____
35
ns
t
ACE
Chip Enable Access Time
(3)
____
20
____
25
____
35
ns
t
AOE
Output Enable Access Time
____
12
____
13
____
20
ns
t
OH
Output Hold fromAddress Change
3
____
3
____
3
____
ns
t
LZ
Output Low-Z Time
(1,2)
3
____
3
____
3
____
ns
t
HZ
Output High-Z Time
(1,2)
____
12
____
15
____
20
ns
t
PU
Chip Enable to Power Up Time
(2)
0
____
0
____
0
____
ns
t
PD
Chip Disable to Power Down Time
(2)
____
20
____
25
____
35
ns
t
SOP
Semaphore Flag Update Pulse (
OE
or
SEM
)
10
____
10
____
15
____
ns
t
SAA
Semaphore Address Access Time
____
20
____
25
____
35
ns
2954 tbl 12b
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| IDT7015S12GI | HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM |
| IDT7015S12JI | HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM |
| IDT7015S12PFI | HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT7015S | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM |
| IDT7015S_06 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM |
| IDT7015S12G | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM |
| IDT7015S12GB | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM |
| IDT7015S12GI | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM |
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