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參數(shù)資料
| 型號： | IDT70125S35L52 |
| 英文描述： | x9 Dual-Port SRAM |
| 中文描述： | X9熱賣雙端口SRAM |
| 文件頁數(shù)： | 8/15頁 |
| 文件大?。?/td> | 190K |
| 代理商： | IDT70125S35L52 |
6.42
IDT70V9379L
High-Speed 32K x 18 Dual-Port Synchronous Pipelined Static RAM
Industrial and Commercial Temperature Ranges
2
1
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102
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91
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NC
A9R
A8R
A7R
A6R
A5R
A4R
A3R
A2R
A1R
A0R
NC
CNTENR
CLKR
ADSR
GND
VCC
NC
A0L
A1L
A2L
A3L
A4L
A5L
A6L
A7L
A8L
A9L
NC
I/O12L
I/O11L
VCC
NC
I/O10L
I/O9L
I/O8L
VCC
I/O7L
I/O6L
I/O5L
I/O4L
GND
I/O3L
I/O2L
GND
I/O1L
I/O0L
VCC
GND
I/O0R
I/O2R
I/O1R
GND
I/O4R
I/O5R
I/O6R
VCC
I/O7R
I/O8R
I/O9R
I/O10R
NC
GND
I/O11R
I/O12R
VCC
I/O3R
70V9379PRF
PK-128-1(4)
128-Pin TQFP
Top View(5)
4857 drw 02
A
1
0
R
A
1
R
A
1
2
R
A
1
3
R
A
1
4
R
N
C
N
C
N
C
L
B
R
U
B
R
C
E
0
R
C
E
1
R
C
N
T
R
S
T
R
V
C
G
N
D
R
/W
R
O
E
R
F
T
/P
IP
E
R
G
N
D
I/
O
1
7
R
I/
O
1
6
R
I/
O
1
5
R
I/
O
1
4
R
V
C
V
C
I/
O
1
3
R
A
1
0
L
A
1
L
A
1
2
L
A
1
3
L
A
1
4
L
N
C
N
C
N
C
LB
L
U
B
L
C
E
0
L
C
E
1
L
C
N
T
R
S
T
L
V
C
G
N
D
R
/W
L
O
E
L
F
T
/P
IP
E
L
G
N
D
I/
O
1
7
L
I/
O
1
6
L
I/
O
1
5
L
I/
O
1
4
L
V
C
G
N
D
I/
O
1
3
L
3
9
4
0
4
1
4
2
4
3
4
5
4
6
4
7
4
8
4
9
5
0
5
1
5
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5
9
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0
6
1
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2
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4
1
2
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1
2
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1
2
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1
2
5
1
2
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1
2
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1
2
1
2
1
2
0
1
9
1
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1
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1
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1
5
1
4
1
3
1
2
1
0
1
0
9
1
0
8
1
0
7
1
0
6
1
0
5
1
0
4
1
0
3
CNTENL
CLKL
ADSL
Description:
The IDT70V9379 is a high-speed 32K x 18 bit synchronous
Dual-Port RAM. The memory array utilizes Dual-Port memory cells
to allow simultaneous access of any address from both ports.
Registers on control, data, and address inputs provide minimal setup
and hold times. The timing latitude provided by this approach allows
systems to be designed with very short cycle times.
Pin Configuration(1,2,3)
NOTES:
1. All Vcc pins must be connected to power supply.
2. All GND pins must be connected to ground.
3. Package body is approximately 14mm x 20mm x 1.4mm.
4. This package code is used to reference the package diagram.
5. This text does not indicate orientation of the actual part-marking.
With an input data register, the IDT70V9379 has been optimized for
applications having unidirectional or bidirectional data flow in bursts. An
automatic power down feature, controlled by
CE0and CE1, permits the
on-chip circuitry of each port to enter a very low standby power mode.
Fabricated using IDT’s CMOS high-performance technology, these
devices typically operate on only 500mW of power.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT70125S35L52B | x9 Dual-Port SRAM |
| IDT70125S45L52 | x9 Dual-Port SRAM |
| IDT70125S45L52B | x9 Dual-Port SRAM |
| IDT70125S55L52 | x9 Dual-Port SRAM |
| IDT70125S55L52B | x9 Dual-Port SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT70125S35L52B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x9 Dual-Port SRAM |
| IDT70125S45J | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:HIGH-SPEED 2K x 9 DUAL-PORT STATIC RAM WITH BUSY & INTERRUPT |
| IDT70125S45JG | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:HIGH-SPEED 2K x 9 DUAL-PORT STATIC RAM WITH BUSY & INTERRUPT |
| IDT70125S45JGI | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:HIGH-SPEED 2K x 9 DUAL-PORT STATIC RAM WITH BUSY & INTERRUPT |
| IDT70125S45L52 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x9 Dual-Port SRAM |
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