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參數(shù)資料
| 型號(hào)： | IDT70104S70FB |
| 英文描述： | x9 Dual-Port SRAM |
| 中文描述： | X9熱賣雙端口SRAM |
| 文件頁數(shù)： | 9/15頁 |
| 文件大?。?/td> | 190K |
| 代理商： | IDT70104S70FB |
6.42
IDT70V9379L
High-Speed 32K x 18 Dual-Port Synchronous Pipelined Static RAM
Industrial and Commercial Temperature Ranges
3
NOTES:
1. "H" = VIH, "L" = VIL, "X" = Don't Care.
2.
ADS, CNTEN, CNTRST = X.
3.
OE is an asynchronous input signal.
Truth Table IRead/Write and Enable Control(1,2,3)
Pin Names
Left Port
Right Port
Names
CE0L, CE1L
CE0R, CE1R
Chip Enables
R/
WL
R/
WR
Read/Write Enable
OEL
OER
Output Enable
A0L - A14L
A0R - A14R
Address
I/O0L - I/O17L
I/O0R - I/O17R
Data Input/Output
CLKL
CLKR
Clock
UBL
UBR
Upper Byte Select
LBL
LBR
Lower Byte Select
ADSL
ADSR
Address Strobe Enable
CNTENL
CNTENR
Counter Enable
CNTRSTL
CNTRSTR
Counter Reset
FT/PIPEL
FT/PIPER
Flow-Through / Pipeline
VCC
Power
GND
Ground
4857 tbl 01
OE
CLK
CE0
CE1
UB
LB
R/
W
Upper Byte
I/O9-17
Lower Byte
I/O0-8
MODE
X
↑
H
X
High-Z
Deselected–Power Down
X
↑
X
L
X
High-Z
Deselected–Power Down
X
↑
L
H
X
High-Z
Both Bytes Deselected
X
↑
LH
L
H
L
DATAIN
High-Z
Write to Upper Byte Only
X
↑
L
HHL
L
High-Z
DATAIN
Write to Lower Byte Only
X
↑
LH
LL
L
DATAIN
Write to Both Bytes
L
↑
LH
L
H
DATAOUT
High-Z
Read Upper Byte Only
L
↑
L
H
L
H
High-Z
DATAOUT
Read Lower Byte Only
L
↑
LH
LLH
DATAOUT
Read Both Bytes
H
X
L
H
L
X
High-Z
Outputs Disabled
4857 tbl 02
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