參數(shù)資料
型號(hào)： IDT7005L70PFB
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類(lèi)： DRAM
英文描述： HIGH-SPEED 8K x 8 DUAL-PORT STATIC RAM
中文描述： 8K X 8 DUAL-PORT SRAM, 70 ns, PQFP64
封裝： 14 X 14 MM, 1.40 MM HEIGHT, TQFP-64
文件頁(yè)數(shù)： 17/20頁(yè)
文件大小： 265K
代理商： IDT7005L70PFB
6.06
6
IDT7005S/L
HIGH-SPEED 8K x 8 DUAL-PORT STATIC RAM
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE(1)(Cont'd.) (VCC = 5.0V
± 10%)
7005X35
7005X55
7005X70
Test
Mil. Only
Symbol
Parameter
Condition
Version
Typ.
(2)
Max.
Typ.
(2)
Max. Typ.
(2)
Max. Unit
ICC
Dynamic Operating
CE = VIL, Outputs Open
MIL.
S
150
300
150
300
140
300
mA
Current
SEM = VIH
L
140
250
140
250
130
250
(Both Ports Active)
f = fMAX
(3)
COM’L.
S
150
250
150
250
—
L
140
210
140
210
—
ISB1
Standby Current
CEL = CER = VIH
MIL.
S
13
80
13
80
10
80
mA
(Both Ports — TTL
SEMR = SEML = VIH
L
10
65
10
651065
Level Inputs)
f = fMAX
(3)
COM’L.
S
13
60
13
60
—
L10
50
10
50
—
ISB2
Standby Current
CE"A"=VIL and CE"B"=VIL(5) MIL.
S
85
190
85
190
80
190
mA
(One Port — TTL
Active Port Outputs Open
L
75
160
75
160
70
160
Level Inputs)
f = fMAX
(3)
COM’L.
S
85
155
85
155
—
SEMR = SEML = VIH
L
75
130
75
130
—
ISB3
Full Standby Current
Both Ports
CEL and
MIL.
S
1.0
30
1.0
30
1.0
30
mA
(Both Ports — All
CER > VCC - 0.2V
L
0.2
10
0.2
10
0.2
10
CMOS Level Inputs)
VIN > VCC - 0.2V or
COM’L.
S
1.0
15
1.0
15
—
VIN < 0.2V, f = 0
(4)
L
0.2
5
0.2
5
—
SEMR = SEML > VCC - 0.2V
ISB4
Full Standby Current
One Port
CE"A" < 0.2V
MIL.
S
80
175
80
175
75
175
mA
(One Port — All
CE"B" > VCC - 0.2V(5)
CMOS Level Inputs)
SEMR = SEML > VCC - 0.2V
L
70
150
70
150
65
150
VIN > VCC - 0.2V or
COM’L.
S
80
135
80
135
—
VIN < 0.2V
Active Port Outputs Open,
L
70
110
80
110
—
f = fMAX
(3)
NOTES:
2738 tbl 10
1. "X" in part numbers indicates power rating (S or L).
2. VCC = 5V, TA = +25
°C and are not production tested. ICC DC = 120mA (typ.)
3. At f = fMAX
, address and I/O'S are cycling at the maximum frequency read cycle of 1/tRC, and using “AC Test Conditions” of input levels of GND to 3V.
4. f = 0 means no address or control lines change.
5. Port "A" may be either left or right port. Port "B" is the port opposite port "A".
DATA RETENTION MODE
VCC
CE
2738 drw 05
4.5V
tCDR
tR
VIH
VDR
VIH
4.5V
VDR
2V
≥
DATA RETENTION WAVEFORM
DATA RETENTION CHARACTERISTICS OVER ALL TEMPERATURE RANGES (L Version Only)
(VLC = 0.2V, VHC = VCC - 0.2V)
(4)
Symbol
Parameter
Test Condition
Min.
Typ.
(1)
Max.
Unit
VDR
VCC for Data Retention
VCC = 2V
2.0
—
V
ICCDR
Data Retention Current
CE > VHC
MIL.
—
100
4000
A
VIN > VHC or
≤ VLC
COM’L.
—
100
1500
tCDR
(3)
Chip Deselect to Data Retention Time
SEM > VHC
0—
—
ns
tR
(3)
Operation Recovery Time
tRC
(2)
——
ns
NOTES:
2738 tbl 11
1. TA = +25
°C, VCC = 2V, and are not production tested.
2. tRC = Read Cycle Time
3. This parameter is guaranteed by device characteriation, but is not production tested.
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