參數(shù)資料
型號(hào): IDT7005L20F
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: DRAM
英文描述: HIGH-SPEED 8K x 8 DUAL-PORT STATIC RAM
中文描述: 8K X 8 DUAL-PORT SRAM, 20 ns, QFP68
封裝: 0.970 X 0.970 INCH, 0.080 INCH HEIGHT, QFP-68
文件頁數(shù): 12/20頁
文件大?。?/td> 265K
代理商: IDT7005L20F
6.06
2
IDT7005S/L
HIGH-SPEED 8K x 8 DUAL-PORT STATIC RAM
MILITARY AND COMMERCIAL TEMPERATURE RANGES
RAM for 16-bit-or-more word systems. Using the IDT MAS-
TER/SLAVE Dual-Port RAM approach in 16-bit or wider
memory system applications results in full-speed, error-free
operation without the need for additional discrete logic.
This device provides two independent ports with separate
control, address, and I/O pins that permit independent,
asynchronous access for reads or writes to any location in
memory. An automatic power down feature controlled by
CE
permits the on-chip circuitry of each port to enter a very low
standby power mode.
Fabricated using IDT’s CMOS high-performance technol-
ogy, these devices typically operate on only 750mW of power.
Low-power (L) versions offer battery backup data retention
capability with typical power consumption of 500
W from a 2V
battery.
The IDT7005 is packaged in a ceramic 68-pin PGA, a 68-
pin quad flatpack, a 68-pin PLCC and a 64-pin Thin Plastic
Quad Flatpack (TQFP). Military grade product is manufac-
tured in compliance with the latest revision of MIL-STD-883,
Class B, making it ideally suited to military temperature
applications demanding the highest level of performance and
reliability.
PIN CONFIGURATIONS (1,2)
2738 drw 02
12
13
14
15
16
17
18
INDEX
19
20
21
22
987
6543
21 68 67 66 65
27 28 29 30 31 32 33 34 35 36 37 38 39
V
CC
VCC
I/O1R
I/O2R
I/O3R
I/O4R
INTL
GND
A4L
A3L
A2L
A1L
A0L
A3R
A0R
A1R
A2R
I/O2L
A5L
R/
W
L
11
10
M/
S
23
24
25
26
40 41 42 43
58
57
56
55
54
53
52
51
50
49
48
59
60
47
46
45
44
64 63 62 61
I/O3L
GND
I/O0R
VCC
A4R
BUSYL
GND
BUSYR
INTR
A
12R
I/O
7R
N/C
GND
OE
R
R/
W
R
SEM
R
CE
R
OE
L
SEM
L
CE
L
N/C
I/O
0L
I/O
1L
IDT7005
J68-1
F68-1
PLCC / FLATPACK
TOP VIEW (3)
I/O4L
I/O5L
I/O6L
I/O7L
I/O5R
I/O6R
N/C
A
12L
N/C
A
11R
N/C
A
10R
A
9R
A
8R
A
7R
A
6R
A
5R
A
11L
A
10L
A
9L
A
8L
A
7L
A
6L
N/C
NOTES:
1. All Vcc pins must be connected to the power supply.
2. All GND pins must be connected to the ground supply.
3. This text does not indicate orientation of the the actual part-marking.
INDEX
IDT7005
PN-64
TQFP
TOP VIEW (3)
8
9
10
11
12
13
14
15
16
1
2
3
4
5
6
7
46
45
44
43
42
41
40
39
38
37
36
35
34
47
48
33
17
18
19
20
32
31
30
29
28
27
26
25
24
23
22
21
49
50
51
52
63
62
61
60
59
58
57
56
55
54
53
64
I/O2L
VCC
GND
A4R
BUSYL
BUSYR
INTR
INTL
GND
M/
S
OE
L
A
5L
I/O
1L
R/
W
L
CE
L
SEM
L
V
CC
N/C
OE
R
CE
R
R/
W
R
SEM
R
A
12R
GND
I/O3L
I/O4L
I/O5L
I/O6L
I/O7L
I/O0R
I/O1R
I/O2R
VCC
I/O3R
I/O4R
I/O5R
I/O
6R
I/O
7R
A
11R
A
10R
A
9R
A
8R
A
7R
A
6R
A
5R
A3R
A2R
A1R
A0R
A0L
A1L
A2L
A3L
A4L
A
6L
A
7L
A
8L
A
9L
A
10L
A
11L
A
12L
I/O
0L
2738 drw 03
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