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參數(shù)資料
| 型號(hào)： | IDT65LVCR2245ASO |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | 3.3V CMOS OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O |
| 中文描述： | 3.3V CMOS電八路總線收發(fā)器具有三態(tài)輸出和5伏電壓的I / O |
| 文件頁(yè)數(shù)： | 2/6頁(yè) |
| 文件大?。?/td> | 74K |
| 代理商： | IDT65LVCR2245ASO |
INDUSTRIAL TEMPERATURE RANGE
2
IDT74LVCR2245A
3.3V CMOS OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
PIN CONFIGURATION
NOTE:
1. As applicable to the device type.
Symbol
C
IN
C
OUT
C
I/O
Parameter
(1)
Input Capacitance
Output Capacitance
I/O Port Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
V
IN
= 0V
Typ.
4.5
5.5
6.5
Max.
6
8
8
Unit
pF
pF
pF
CAPACITANCE
(T
A
= +25°C, F = 1.0MHz)
Symbol
V
TERM
T
STG
I
OUT
I
IK
I
OK
I
CC
I
SS
Description
Max
Unit
V
°C
mA
mA
Termnal Voltage with Respect to GND
Storage Temperature
DC Output Current
Continuous Clamp Current,
V
I
< 0 or V
O
< 0
Continuous Current through each
V
CC
or GND
–0.5 to +6.5
–65 to +150
–50 to +50
–50
±100
mA
ABSOLUTE MAX IMUM RATINGS
(1)
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUMRATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximumrating
conditions for extended periods may affect reliability.
SOIC/ SSOP/ QSOP/ TSSOP
TOP VIEW
NOTE:
1. H = HIGH Voltage Level
X = Dont Care
L = LOW Voltage Level
Inputs
OE
DIR
Outputs
L
L
B Data to A Bus
L
H
A Data to B Bus
H
X
Isolation
FUNCTION TABLE
(1)
Pin Names
OE
Ax, Bx
DIR
Description
Output Enable Input (Active LOW)
Data Inputs or 3-State Outputs
Direction Control Output
PIN DESCRIPTION
2
3
1
A
1
V
CC
16
15
14
B
4
B
3
B
5
B
1
B
2
11
B
7
B
6
B
8
19
18
20
17
13
12
DIR
5
6
A
6
7
A
4
A
5
4
A
2
A
3
8
9
GND
10
A
7
A
8
OE
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