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參數(shù)資料
| 型號： | IDT6116SA15SO |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | Quad Enhanced JFET Low-Power Precision Operational Amplifier 14-TSSOP 0 to 70 |
| 中文描述： | 2K X 8 STANDARD SRAM, 15 ns, PDSO24 |
| 封裝： | 0.300 INCH, SOIC-24 |
| 文件頁數(shù)： | 4/10頁 |
| 文件大小： | 91K |
| 代理商： | IDT6116SA15SO |
5.1
4
IDT6116SA/LA
CMOS STATIC RAM 16K (2K x 8-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
NOTES:
1. T
A
= + 25
°
C
2. t
RC
= Read Cycle Time.
3. This parameter is guaranteed by device characterization, but is not production tested.
3089 tbl 10
(LA Version Only) V
LC
= 0.2V, V
HC
= V
CC
– 0.2V
DC ELECTRICAL CHARACTERISTICS
(1)
(Continued)
V
CC
= 5.0V
±
10%, V
LC
= 0.2V, V
HC
= V
CC
- 0.2V
NOTES:
1. All values are maximum guaranteed values.
2. 0
°
C to + 70
°
C temperature range only.
3. –55
°
C to + 125
°
C temperature range only.
4. f
MAX
= 1/t
RC
, only address inouts are toggling at f
MAX
, f = 0 means address inputs are not changing.
3089 tbl 09
V
CC
V
CC
2.0V
3.0V
—
—
0.5
1.5
0.5
1.5
0
—
DATA RETENTION CHARACTERISTICS OVER ALL TEMPERATURE RANGES
Typ.
(1)
Max.
Symbol
V
DR
I
CCDR
Parameter
Test Conditions
—
Min.
2.0
—
—
—
2.0V
—
200
20
—
3.0V
—
300
30
—
Unit
V
μ
A
V
CC
for Data Retention
Data Retention Current
MIL.
COM'L.
CS
≥
V
HC
V
IN
≥
V
HC
or
≤
V
LC
t
CDR
(3)
Data Deselect to Data
Retention Time
Operation Recovery Time
Input Leakage Current
ns
t
R
(3)
|I
LI
|
t
RC
(2)
—
—
—
—
—
—
2
—
2
ns
μ
A
6116SA45
6116LA45
6116SA55
(3)
6116LA55
(3)
6116SA70
(3)
6116LA70
(3)
6116SA90
(3)
6116LA90
(3)
6116SA120
(3)
6116LA120
(3)
6116SA150
(3)
6116LA150
(3)
Symbol
I
CC1
Parameter
Power
Com'l. Mil.
SA
80
Com'l.
—
Mil.
90
Com'l.
—
Mil.
90
Com'l.
—
Mil.
90
Com'l.
—
Mil.
90
Com'l.
—
Mil.
90
Unit
mA
Operating Power Supply
Current,
CS
≤
V
IL
,
Outputs Open,
V
CC
= Max., f = 0
Dynamic Operating
Current,
CS
≤
V
IL
,
V
CC
= Max.,
Outputs Open, f = f
MAX
(4)
90
LA
75
85
—
85
—
85
—
85
—
85
—
85
I
CC2
SA
100
100
—
100
—
100
—
100
—
100
—
90
mA
LA
90
95
—
90
—
90
—
85
—
85
—
85
I
SB
Standby Power Supply
Current (TTL Level)
CS
≥
V
IH
, V
CC
= Max.,
Outputs Open, f = f
MAX
(4)
SA
25
25
—
25
—
25
—
25
—
25
—
25
mA
LA
20
20
—
20
—
20
—
25
—
15
—
15
I
SB1
Full Standby Power
Supply Current
(CMOS Level),
CS
≥
V
HC
,
V
CC
= Max., V
IN
≥
V
HC
or V
IN
≤
V
LC
, f = 0
SA
2
10
—
10
—
10
—
10
—
10
—
10
mA
LA
0.1
0.9
—
0.9
—
0.9
—
0.9
—
0.9
—
0.9
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