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參數(shù)資料
| 型號(hào)： | IDT5V994JG |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC32 |
| 封裝： | PLASTIC, LCC-32 |
| 文件頁(yè)數(shù)： | 1/9頁(yè) |
| 文件大?。?/td> | 125K |
| 代理商： | IDT5V994JG |
1
INDUSTRIALTEMPERATURERANGE
IDT5V994
3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER
sO E
1Q0
Skew
Select
1Q1
1F1:0
3
2Q0
Skew
Select
2Q1
2F1:0
3
REF
PLL
FB
3
3Q0
Skew
Select
3Q1
3F1:0
3
4Q0
4Q1
Skew
Select
4F1:0
3
PE TE ST
OCTOBER 2000
2000
Integrated Device Technology, Inc.
DSC - 5828
c
IDT5V994
PRELIMINARY
INDUSTRIAL TEMPERATURE RANGE
3.3V PROGRAMMABLE
SKEW PLL CLOCK DRIVER
TURBOCLOCK PLUS
FUNCTIONAL BLOCK DIAGRAM
DESCRIPTION
The IDT5V994 is a high fanout 3.3V PLL based clock driver intended for
high performance computing and data-communications applications. A key
feature of the programmable skew is the ability of outputs to lead or lag the
REF input signal. The IDT5V994 has eight programmable skew outputs in
four banks of 2. Skew is controlled by 3-level input signals that may be hard-
wired to appropriate HIGH-MID-LOW levels.
When the
sOE pin is held low, all the outputs are synchronously enabled.
However, if
sOE is held high, all the outputs except 3Q0 and 3Q1 are
synchronously disabled.
Furthermore, when the PE is held high, all the outputs are synchronized
with the positive edge of the REF clock input. When PE is held low, all the
outputs are synchronized with the negative edge of REF. The IDT5V994
has LVTTL outputs with 12mA balanced drive outputs.
FEATURES:
REF is 5V tolerant
4 pairs of programmable skew outputs
Low skew: 200ps same pair, 250ps all outputs
Selectable positive or negative edge synchronization:
Excellent for DSP applications
Synchronous output enable
Input frequency: 17.5MHz to 133MHz
Output frequency: 70MHz to 133MHz
2x, 4x, 1/2, and 1/4 outputs (of VCO frequency)
3-level inputs for skew control
PLL bypass for DC testing
External feedback, internal loop filter
12mA balanced drive outputs
Low Jitter: <200ps peak-to-peak
Industrial temperature range
Available in 32-pin PLCC and TQFP Packages
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT5V994JGI | 功能描述:IC CLK DVR PLL 3.3V PROGR 32PLCC RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:TurboClock™ Plus 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:時(shí)鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
| IDT5V994JGI8 | 功能描述:IC CLK DVR PLL 3.3V PROGR 32PLCC RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:TurboClock™ Plus 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:時(shí)鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
| IDT5V994JI | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT5V994PFGI | 功能描述:IC CLK DVR PLL 3.3V PROGR 32TQFP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:TurboClock™ Plus 標(biāo)準(zhǔn)包裝:2,000 系列:- 類型:PLL 頻率合成器 PLL:是 輸入:晶體 輸出:時(shí)鐘 電路數(shù):1 比率 - 輸入:輸出:1:1 差分 - 輸入:輸出:無(wú)/無(wú) 頻率 - 最大:1GHz 除法器/乘法器:是/無(wú) 電源電壓:4.5 V ~ 5.5 V 工作溫度:-20°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-LSSOP（0.175"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-SSOP 包裝:帶卷 (TR) 其它名稱:NJW1504V-TE1-NDNJW1504V-TE1TR |
| IDT5V994PFGI8 | 功能描述:IC CLK DVR PLL 3.3V PROGR 32TQFP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:TurboClock™ Plus 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:時(shí)鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
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