參數(shù)資料
型號: IDT5V41066PGG
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 8/14頁
文件大小: 0K
描述: IC CLK GEN SPRED SPECTRM 20TSSOP
產(chǎn)品培訓(xùn)模塊: Timing Solutions for PCI-Express
標(biāo)準(zhǔn)包裝: 148
系列: PCI Express® (PCIe)
類型: 時鐘/頻率合成器,擴(kuò)展頻譜時鐘發(fā)生器
PLL:
主要目的: 以太網(wǎng),PCI Express(PCIe)
輸入: 時鐘,晶體
輸出: HCSL,LVDS
電路數(shù): 1
比率 - 輸入:輸出: 1:2
差分 - 輸入:輸出: 無/是
頻率 - 最大: 200MHz
電源電壓: 3.135 V ~ 3.465 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 20-TSSOP
包裝: 管件
其它名稱: 800-2601-5
IDT5V41066PGG-ND
IDT5V41066
4 OUTPUT PCIE GEN1/2 SYNTHESIZER
IDT 4 OUTPUT PCIE GEN1/2 SYNTHESIZER
3
IDT5V41066
REV D 112211
Pin Descriptions
Pin
Name
Pin
Type
Pin Description
1
VDDXD
Power
Connect to +3.3 V digital supply.
2
S0
Input
Spread spectrum select pin #0. See table above. Internal pull-up resistor.
3
S1
Input
Spread spectrum select pin #1. See table above Internal pull-up resistor.
4
S2
Input
Spread spectrum select pin #2. See table above. Internal pull-up resistor.
5
X1
Input
Crystal connection. Connect to a fundamental mode crystal or clock input.
6
X2
Output
Crystal connection. Connect to a fundamental mode crystal or leave open.
7
PD
Input
Powers down all PLL’s and tri-states outputs when low. Internal pull-up resistor.
8
OE
Input
Provides output on, tri-states output (High = enable outputs; Low = disable outputs).
Internal pull-up resistor.
9
GND
Power
Connect to digital ground.
10
IREF
Output
Precision resistor attached to this pin is connected to the internal current reference.
11
CLKD
Output
Selectable 100/200 MHz spread spectrum differential Complement output clock D.
12
CLKD
Output
Selectable 100/200 MHz spread spectrum differential True output clock D.
13
CLKC
Output
Selectable 100/200 MHz spread spectrum differential Complement output clock C.
14
CLKC
Output
Selectable 100/200 MHz spread spectrum differential True output clock C.
15
VDDODA
Power
Connect to +3.3 V analog supply.
16
GND
Power
Connect to analog ground.
17
CLKB
Output
Selectable 100/200 MHz spread spectrum differential Complement output clock B.
18
CLKB
Output
Selectable 100/200 MHz spread spectrum differential True output clock B.
19
CLKA
Output
Selectable 100/200 MHz spread spectrum differential Complement output clock A.
20
CLKA
Output
Selectable 100/200 MHz spread spectrum differential True output clock A.
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