DIFFERENTIAL INPUT AC TEST CONDITIONS FOR HSTL Symbol Parameter " />
參數(shù)資料
型號: IDT5T915PAGI8
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 18/21頁
文件大小: 0K
描述: IC CLK BUFF 1:5 250MHZ 48-TSSOP
標(biāo)準(zhǔn)包裝: 2,000
類型: 扇出緩沖器(分配)
電路數(shù): 1
比率 - 輸入:輸出: 1:5
差分 - 輸入:輸出: 是/是
輸入: eHSTL,HSTL,LVPECL,LVTTL
輸出: eHSTL,HSTL,LVTTL
頻率 - 最大: 250MHz
電源電壓: 2.4 V ~ 2.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-TFSOP(0.240",6.10mm 寬)
供應(yīng)商設(shè)備封裝: 48-TSSOP
包裝: 帶卷 (TR)
其它名稱: 5T915PAGI8
INDUSTRIALTEMPERATURERANGE
6
IDT5T915
2.5VDIFFERENTIAL1:5CLOCKBUFFERTERABUFFER
DIFFERENTIAL INPUT AC TEST CONDITIONS FOR HSTL
Symbol
Parameter
Value
Units
VDIF
Input Signal Swing(1)
1V
VX
DifferentialInputSignalCrossingPoint(2)
750
mV
VTHI
InputTimingMeasurementReferenceLevel(3)
CrossingPoint
V
tR, tF
InputSignalEdgeRate(4)
1
V/ns
NOTES:
1. The 1V peak-to-peak input pulse level is specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment. Compliant devices must meet the
VDIF (AC) specification under actual use conditions.
2. A 750mV crossing point level is specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment. Compliant devices must meet the VX specification
under actual use conditions.
3. In all cases, input waveform timing is marked at the differential cross-point of the input signals.
4. The input signal edge rate of 1V/ns or greater is to be maintained in the 20% to 80% range of the input waveform.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE FOR eHSTL(1)
Symbol
Parameter
Test Conditions
Min.
Typ.(7)
Max
Unit
InputCharacteristics
IIH
Input HIGH Current(9)
VDD = 2.6V
VI = VDDQ/GND
±5
μA
IIL
InputLOWCurrent(9)
VDD = 2.6V
VI = GND/VDDQ
——
±5
VIK
ClampDiodeVoltage
VDD = 2.4V, IIN = -18mA
- 0.7
- 1.2
V
VIN
DCInputVoltage
- 0.3
+3.6
V
VDIF
DCDifferentialVoltage(2,8)
0.2
V
VCM
DC Common Mode Input Voltage(3,8)
800
900
1000
mV
VIH
DC Input HIGH(4,5,8)
VREF + 100
mV
VIL
DC Input LOW(4,6,8)
—VREF - 100
mV
VREF
Single-EndedReferenceVoltage(4,8)
900
mV
OutputCharacteristics
VOH
Output HIGH Voltage
IOH = -8mA
VDDQ - 0.4
V
IOH = -100
μAVDDQ - 0.1
V
VOL
OutputLOWVoltage
IOL = 8mA
0.4
V
IOL = 100
μA
0.1
V
NOTES:
1. See RECOMMENDED OPERATING RANGE table.
2. VDIF specifies the minimum input differential voltage (VTR - VCP) required for switching where VTR is the "true" input level and VCP is the "complement" input level. Differential mode
only. The DC differential voltage must be maintained to guarantee retaining the existing HIGH or LOW input. The AC differential voltage must be achieved to guarantee switching
to a new state.
3. VCM specifies the maximum allowable range of (VTR + VCP) /2. Differential mode only.
4. For single-ended operation, in a differential mode, A/VREF is tied to the DC voltage VREF.
5. Voltage required to maintain a logic HIGH, single-ended operation in differential mode.
6. Voltage required to maintain a logic LOW, single-ended operation in differential mode.
7. Typical values are at VDD = 2.5V, VDDQ = 1.8V, +25°C ambient.
8. The reference clock input is capable of HSTL, eHSTL, LVEPECL, 1.8V or 2.5V LVTTL operation independent of the device output. The correct input interface table should be
referenced.
9. For differential mode (RxS = LOW), A and A/VREF must be at the opposite rail.
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