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參數(shù)資料
| 型號： | IDT54FCT807BTLB |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 3.3V, 25 to 80 MHz, 4 Output Zero-Delay Clock Driver |
| 中文描述： | FCT SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), CQCC20 |
| 封裝： | LCC-20 |
| 文件頁數(shù)： | 1/7頁 |
| 文件大小： | 130K |
| 代理商： | IDT54FCT807BTLB |
Integrated Device Technology, Inc.
FEATURES:
0.5 MICRON CMOS Technology
Guaranteed low skew < 250ps (max.)
Very low duty cycle distortion < 350ps (max.)
High speed: propagation delay < 2.5ns (max.)
100MHz operation
TTL compatible inputs and outputs
TTL level output voltage swings
1:10 fanout
Output rise and fall time < 1.5ns (max.)
Low input capacitance: 4.5pF typical
High Drive: -32mA I
OH
, 48mA I
OL
ESD > 2000V per MIL STD-883, Method 3015;
MILITARY AND COMMERCIAL TEMPERATURE RANGES
OCTOBER 1995
1995 Integrated Device Technology, Inc.
9.3
DSC-4242/3
1
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FAST CMOS
1-TO-10
CLOCK DRIVER
IDT54/74FCT807BT/CT
3017 drw 01
O
1
O
2
O
3
O
4
O
5
O
6
O
7
O
8
O
9
O
10
IN
> 200V using machine model (C = 200pF, R = 0)
Available in DIP, SOIC, SSOP, QSOP, Cerpack and
LCC packages
Military product compliant to MIL-STD-883, Class B
GND
VCC
GND
VCC
GND
GND
V
CC
GND
O
5
V
CC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
DIP/SOIC/SSOP/QSOP/CERPACK
TOP VIEW
P20-1
D20-1
SO20-2
SO20-7
SO20-8
&
E20-1
IN
O
1
O
2
O
3
O
4
O
10
O
9
O
8
O
7
O
6
INDEX
V
CC
GND
V
CC
GND
V
CC
G
O
1
I
V
C
O
1
O
4
G
O
5
O
6
G
LCC
TOP VIEW
O
2
O
3
O
9
O
8
O
7
3
2
20 19
1
4
5
6
7
8
18
17
16
15
14
9 10 11 12 13
L20-2
3017 drw 03
3017 drw 02
DESCRIPTION:
The IDT54/74FCT807BT/CT clock driver is built using
advanced dual metal CMOS technology. This low skew clock
driver features 1:10 fanout, providing minimal loading on the
preceding drivers. The IDT54/74FCT807BT/CT offers low
capacitance inputs with hysteresis for improved noise margins.
TTL level outputs and multiple power and grounds reduce
noise. The device also features -32/48mA drive capability for
driving low impedance traces.
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATIONS
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT74FCT807BTLB | 3.3V, 80 to134 MHz, 4 Output Zero-Delay Clock Driver |
| IDT54FCT807BTPB | 3.3V, Programmable Skew PLL Clock Driver with 750ps Accuracy, LVTTL, 3.75 to 80 MHz |
| IDT74FCT807BTPB | 3.3V, Programmable Skew PLL Clock Driver with 750ps Accuracy, LVTTL, 3.75 to 110 MHz |
| IDT54FCT807BTSOB | 3.3V, 4 Outputs, Crystal/LVCMOS to LVPECL Clock Buffer, Selectable inputs |
| IDT74FCT807BTSOB | IC CLOCK BUFFER 20-TSSOP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT54FCT821ADB | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT54FCT821BDB | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT54FCT821HATEB | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT54FCT821HCTEB | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| IDT54FCT845ADB | 制造商:Integrated Device Technology Inc 功能描述: |
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