- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄377446 > IDT54FCT162701AT (Integrated Device Technology, Inc.) CAP 15UF 20V 20% TANT SMD-7343-31 TR-7-PL SN100% LOWESR-350 PDF資料下載
參數(shù)資料
| 型號： | IDT54FCT162701AT |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | CAP 15UF 20V 20% TANT SMD-7343-31 TR-7-PL SN100% LOWESR-350 |
| 中文描述： | 快速CMOS 18位讀/寫緩沖區(qū) |
| 文件頁數(shù)： | 1/9頁 |
| 文件大?。?/td> | 112K |
| 代理商： | IDT54FCT162701AT |
Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
AUGUST 1996
1996 Integrated Device Technology, Inc.
5.15
DSC-2915/3
1
The IDT logo is a registered trademark of Integrated Device Techology, Inc.
FAST CMOS 18-BIT
R/W BUFFER
IDT54/74FCT162701T/AT
DESCRIPTION:
The FCT162701T/AT is an 18-bit Read/Write buffer with
a four deep FIFO and a read-back latch. It can be used as
a read/write buffer between a CPU and memory or to
interface a high-speed bus and a slow peripheral. The A-
to-B (write) path has a four deep FIFO for pipelined opera-
tions. The FIFO can be reset and a FIFO full condition is
indicated by the full flag (
FF
). The B-to-A (read) path has a
latch. A HIGH on LE, allows data to flow transparently from
B-to-A. A LOW on LE allows the data to be latched on the
falling edge of LE.
The FCT162701T/AT has a balanced output drive with
series termination. This provides low ground bounce,
minimal undershoot and controlled output edge rates.
FEATURES:
0.5 MICRON CMOS Technology
Typical t
SK
(o) (Output Skew) < 250ps
Low input and output leakage
≤
1
μ
A (max.)
ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
Packages include 25 mil pitch SSOP, 19.6 mil pitch TSSOP,
15.7 mil pitch TVSOP and 25 mil pitch Cerpack
Extended commercial range of -40
°
C to +85
°
C
Balanced Output Drivers:
±
24mA (commercial),
±
16mA (military)
Reduced system switching noise
Typical V
OLP
(Output Ground Bounce) < 0.6V at
V
CC
= 5V, T
A
= 25
°
C
Ideal for new generation x86 write-back cache solutions
Suitable for modular x86 architectures
Four deep write FIFO
Latch in read path
Synchronous FIFO reset
2915 drw 01
LATCH
LE
OEBA
18
18
A
1-18
B
1-18
FIFO
(4 deep)
OEAB
FF
CLK
RESET
WCE
RCE
FUNCTIONAL BLOCK DIAGRAM
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT54FCT162701T | CAP 15UF 20V 20% TANT SMD-7343-31 TR-7-PL SN100% LOWESR-350 ROHS-GUARANTEED |
| IDT54FCT16270ATE | CAP 15UF 25V 20% TANT SMD-7343-31 TR-7-PL GOLD LOWESR-350 |
| IDT54FCT16270ATEB | CAP 15UF 25V 20% TANT SMD-7343-31 TR-7-PL SN/PB5% LOWESR-350 |
| IDT54FCT16270ATPA | CAP 15UF 25V 20% TANT SMD-7343-31 TR-7-PL SN100% LOWESR-350 |
| IDT54FCT16270ATPAB | FAST CMOS 18-BIT R/W BUFFER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT54FCT162701T | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:FAST CMOS 18-BIT R/W BUFFER |
| IDT54FCT16270ATE | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:FAST CMOS 18-BIT R/W BUFFER |
| IDT54FCT16270ATEB | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:FAST CMOS 18-BIT R/W BUFFER |
| IDT54FCT16270ATPA | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:FAST CMOS 18-BIT R/W BUFFER |
| IDT54FCT16270ATPAB | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:FAST CMOS 18-BIT R/W BUFFER |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。