參數(shù)資料
型號: IDT54FCT162543ETPV
廠商: Integrated Device Technology, Inc.
英文描述: FAST CMOS 16-BIT LATCHED TRANSCEIVER
中文描述: 快速CMOS 16位鎖存收發(fā)器
文件頁數(shù): 7/8頁
文件大?。?/td> 127K
代理商: IDT54FCT162543ETPV
IDT54/74FCT16543T/AT/CT/ET, 162543T/AT/CT/ET
FAST CMOS 16-BIT LATCHED TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
5.12
7
DEFINITIONS:
CL=
Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
Pulse
Generator
R T
D.U.T.
V CC
VIN
C L
VOUT
50pF
500
500
7.0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
tSU
tH
tREM
tSU
tH
HIGH-LOW-HIGH
PULSE
LOW-HIGH-LOW
PULSE
tW
1.5V
SAME PHASE
INPUT TRANSITION
3V
1.5V
0V
1.5V
VOH
tPLH
OUTPUT
OPPOSITE PHASE
INPUT TRANSITION
3V
1.5V
0V
tPLH
tPHL
VOL
CONTROL
INPUT
3V
1.5V
0V
3.5V
0V
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
SWITCH
CLOSED
SWITCH
OPEN
VOL
0.3V
tPLZ
tPZL
tPZH
tPHZ
3.5V
0V
1.5V
ENABLE
DISABLE
VOH
PRESET
CLEAR
CLOCK ENABLE
ETC.
ENABLE AND DISABLE TIMES
PROPAGATION DELAY
SET-UP, HOLD AND RELEASE TIMES
PULSE WIDTH
SWITCH POSITION
Test
Switch
Disable Low
Enable Low
Closed
All Other Tests
Open
Open Drain
2618 lnk 10
2618 drw 05
2618 drw 06
2618 drw 07
2618 drw 08
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH
2. Pulse Generator for All Pulses: Rate
≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
2618 drw 09
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IDT54FCT162543ETPVB 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:FAST CMOS 16-BIT LATCHED TRANSCEIVER
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