參數(shù)資料
型號: IDT54FCT162543ETEB
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 總線收發(fā)器
英文描述: FAST CMOS 16-BIT LATCHED TRANSCEIVER
中文描述: FCT SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, CDFP56
封裝: 0.635 MM PITCH, CERPACK-56
文件頁數(shù): 1/7頁
文件大?。?/td> 131K
代理商: IDT54FCT162543ETEB
1
IDT54/74FCT162543T/AT/CT/ET
FAST CMOS 16-BIT LATCHED TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
AUGUST 1999
1999 Integrated Device Technology, Inc.
DSC-5445/-
c
IDT54/74FCT162543T/AT/CT/ET
MILITARY AND COMMERCIAL TEMPERATURE RANGES
FAST CMOS
16-BIT LATCHED
TRANSCEIVER
DESCRIPTION:
The FCT162543T/AT/CT/ET 16-bit latched transceivers are built
using advanced dual metal CMOS technology. These high-speed, low-
power devices are organized as two independent 8-bit D-type latched
transceivers with separate input and output control to permt independent
control of data flow in either direction. For example, the A-to-B Enable
(x
CEAB
) must be low in order to enter data fromthe A port or to output data
fromthe B port. x
LEAB
controls the latch function. When x
LEAB
is low, the
latches are transparent. A subsequent low-to-high transition of x
LEAB
signal puts the A latches in the storage mode. x
OEAB
performs output
enable function on the B port. Data flow fromthe B port to the A port is simlar
but requires using x
CEBA
, x
LEBA
, and x
OEBA
inputs. Flow-through
organization of signal pins simplifies layout. All inputs are designed with
hysteresis for improved noise margin.
The FCT162543T/AT/CT/ET have balanced output drive with current
limting resistors. This offers low ground bounce, mnimal undershoot, and
controlled output fall times–reducing the need for external series termnat-
ing resistors. The FCT162543T/AT/CT/ET are plug-in replacements for
the FCT16543T/AT/CT/ET and 54/74ABT16543 for on-board bus inter-
face applications.
FUNCTIONAL BLOCK DIAGRAM
C
D
1
B
1
1
LEAB
1
CEAB
1
OEAB
1
LEBA
1
CEBA
1
OEBA
TO SEVEN OTHER CHANNELS
1
A
1
2
B
1
2
LEAB
2
CEAB
2
OEAB
2
LEBA
2
CEBA
2
OEBA
TO SEVEN OTHER CHANNELS
2
A
1
C
D
C
D
C
D
56
54
55
1
3
2
5
29
31
30
28
26
27
15
52
42
FEATURES:
0.5 MICRON CMOS Technology
High-speed, low-power CMOS replacement for ABT functions
Typical t
SK
(o) (Output Skew) < 250ps
Low input and output leakage
1μA (max.)
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
25 ml pitch SSOP, 19.6 ml pitch TSSOP, 15.7 ml pitch TVSOP
and 25 ml pitch CERPACK packages
Extended commercial range of -40°C to +85°C
V
CC
= 5V ±10%
Balanced Output Drivers:
±24mA (commercial)
±16mA (mlitary)
Reduced systemswitching noise
Typical V
OLP
(Output Ground Bounce) < 0.6V at V
CC
= 5V, T
A
=
25°C
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