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參數(shù)資料
| 型號(hào)： | IDT2308A-3DCI8 |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁(yè)數(shù)： | 1/10頁(yè) |
| 文件大小： | 0K |
| 描述： | IC CLOCK MULT ZD STD DRV 16-SOIC |
| 產(chǎn)品變化通告： | Product Discontinuation 13/May/2009 |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | 倍增器，零延遲緩沖器 |
| PLL： | 帶旁路 |
| 輸入： | LVTTL |
| 輸出： | LVTTL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:8 |
| 差分 - 輸入:輸出： | 無(wú)/無(wú) |
| 頻率 - 最大： | 133.3MHz |
| 除法器/乘法器： | 無(wú)/是 |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | 2308A-3DCI8 |
1
COMMERCIALANDINDUSTRIALTEMPERATURERANGES
IDT2308A
3.3V ZERO DELAY CLOCK MULTIPLIER
AUGUST 2012
2012
Integrated Device Technology, Inc.
DSC 6587/9
c
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FEATURES:
Phase-Lock Loop Clock Distribution for Applications ranging
from 10MHz to 133MHz operating frequency
Distributes one clock input to two banks of four outputs
Separate output enable for each output bank
External feedback (FBK) pin is used to synchronize the outputs
to the clock input
Output Skew <200 ps
Low jitter <200 ps cycle-to-cycle
1x, 2x, 4x output options (see table):
– IDT2308A-1 1x
– IDT2308A-2 1x, 2x
– IDT2308A-3 2x, 4x
– IDT2308A-4 2x
– IDT2308A-1H and -2H for High Drive
No external RC network required
Operates at 3.3V VDD
Available in SOIC and TSSOP packages
FUNCTIONALBLOCKDIAGRAM
DESCRIPTION:
The IDT2308A is a high-speed phase-lock loop (PLL) clock multiplier. It is
designedtoaddresshigh-speedclockdistributionandmultiplicationapplica-
tions.Thezerodelayisachievedbyaligningthephasebetweentheincoming
clock and the output clock, operable within the range of 10 to 133MHz.
TheIDT2308Ahastwobanksoffouroutputseachthatarecontrolledviatwo
selectaddresses.Byproperselectionofinputaddresses,bothbankscanbe
put in tri-state mode. In test mode, the PLL is turned off, and the input clock
directly drives the outputs for system testing purposes. In the absence of an
input clock, the IDT2308A enters power down. In this mode, the device will
drawlessthan12AforCommercialTemperaturerangeandlessthan25A
forIndustrialtemperaturerange,andtheoutputsaretri-stated.
The IDT2308A is available in six unique configurations for both pre-
scaling and multiplication of the Input REF Clock. (See available options
table.)
ThePLLisclosedexternallytoprovidemoreflexibilitybyallowingtheuser
tocontrolthedelaybetweentheinputclockandtheoutputs.
TheIDT2308AischaracterizedforbothIndustrialandCommercialopera-
tion.
IDT2308A
3.3V ZERO DELAY CLOCK
MULTIPLIER
PLL
S1
2
14
15
3
CLKA1
CLKA2
CLKA3
CLKA4
6
10
11
CLKB1
CLKB2
CLKB3
CLKB4
9
FBK
16
Control
Logic
7
8
1
REF
S2
(-2, -3)
(-3, -4)
2
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT2308A-3PG | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:3.3V ZERO DELAY CLOCK MULTIPLIER |
| IDT2308A-3PGG | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:3.3V ZERO DELAY CLOCK MULTIPLIER |
| IDT2308A-3PGGI | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:3.3V ZERO DELAY CLOCK MULTIPLIER |
| IDT2308A-3PGI | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:3.3V ZERO DELAY CLOCK MULTIPLIER |
| IDT2308A-4 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:3.3V ZERO DELAY CLOCK MULTIPLIER |
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