參數(shù)資料
型號: ID100
廠商: Linear Integrated Systems
英文描述: MONOLITHIC DUAL PICO AMPERE DIODES
中文描述: 整體式雙匹克安培二極管
文件頁數(shù): 2/2頁
文件大小: 181K
代理商: ID100
Figure 1. Operational Amplifier Protection
Input Differential Voltage limited to 0.8V (typ) by Diodes ID100 D
1
and D
2
.
Common Mode Input voltage limited by Diodes ID100 D
3
and D
4
to ±15V.
Figure 2. Sample and Hold Circuit
Typical Sample and Hold circuit with clipping. ID100 diodes reduce offset
voltages fed capacitively from the ID100 switch gate.
FIGURE 1
2N4117A
R
2N4393
-V
+V
V
OUT
D2
D1
C
ID100
CONTROL
SIGNAL
e
in
+V
FIGURE 2
-15V
+15V
OP-27
+
D1
D2
D3
D4
-
ID100
TO-78
0.335
0.370
0.305
0.335
0.016
0.019
DIM. A
0.165
0.185
0.040
MAX.
0.016
0.021
DIM. B
MIN. 0.500
0.200
0.100
0.100
0.028
0.034
45°
1
23
5
6
7
0.029
0.045
SEATING
PLANE
TO-71
Six Lead
0.230
0.209
DIA.
DIA.
0.195
0.175
0.030
MAX.
0.500 MIN.
0.150
0.115
0.019
0.016
DIA.
6 LEADS
3
2
1
5
6
0.046
0.036
45°
0.048
0.028
0.100
0.050
7
Linear Integrated Systems
4042 Clipper Court Fremont, CA 94538 Tel: 510 490-9160 Fax: 510 353-0261
1.
2.
3.
Information furnished by Linear Integrated Systems is believed to be accurate and reliable. However, no responsibility is assumed for its
use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implicatio
otherwise under any patent or patent rights of Linear Integrated Systems.
Absolute maximum ratings are limiting values above which serviceability may be impaired.
Design reference only, not 100% tested.
Pins 3 & 5 on ID100 and ID101 must not be connected, in any fashion or manner, to any circuit or node.
n or
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