參數(shù)資料
型號(hào): ICX282
廠商: Sony Corporation
英文描述: Timing Generator for Frame Readout CCD Image Sensor
中文描述: 時(shí)序發(fā)生器傳感器讀出CCD圖像幀
文件頁(yè)數(shù): 4/48頁(yè)
文件大小: 526K
代理商: ICX282
4
ICX282AKF
1
V
L
setting is the V
VL
voltage of the vertical clock waveform, or the same voltage as the V
L
power supply
for the V driver should be used.
2
Do not apply a DC bias to the substrate clock and reset gate clock pins, because a DC bias is generated
within the CCD.
Clock Voltage Conditions
Readout clock voltage
Vertical transfer clock
voltage
Horizontal transfer
clock voltage
Reset gate clock
voltage
Substrate clock voltage
Item
V
VT
V
VH1
, V
VH2
V
VH3
, V
VH4
V
VL1
, V
VL2
,
V
VL3
, V
VL4
V
φ
V
V
VH3
V
VH
V
VH4
V
VH
V
VHH
V
VHL
V
VLH
V
VLL
V
φ
H
V
HL
V
CR
V
φ
RG
V
RGLH
V
RGLL
V
RGL
V
RGLm
V
φ
SUB
Symbol
14.55
0.05
0.2
8.0
6.8
0.25
0.25
3.0
0.05
0.5
3.0
21.5
Min.
15.0
0
0
7.5
7.5
3.3
0
1.65
3.3
22.5
Typ.
15.45
0.05
0.05
7.0
8.05
0.1
0.1
0.6
0.9
0.9
0.5
3.6
0.05
3.6
0.4
0.5
23.5
Max. Unit
1
2
2
2
2
2
2
2
2
2
2
3
3
3
4
4
4
5
Waveform
diagram
V
VH
= (V
VH1
+ V
VH2
)/2
V
VL
= (V
VL3
+ V
VL4
)/2
V
φ
V
= V
VH
n
V
VL
n (n = 1 to 4)
High-level coupling
High-level coupling
Low-level coupling
Low-level coupling
Cross-point voltage
Low-level coupling
Low-level coupling
Remarks
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
DC Characteristics
Supply current
Item
I
DD
Symbol
7.0
Min.
Unit
Remarks
Typ.
Max.
mA
10.0
4.0
Bias Conditions
Supply voltage
Protective transistor bias
Substrate clock
Reset gate clock
Item
V
DD
V
L
φ
SUB
φ
RG
Symbol
15.0
1
2
2
Min.
14.55
V
Unit
Remarks
Typ.
Max.
15.45
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