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參數(shù)資料
| 型號： | ICX039BLA |
| 廠商： | Sony Corporation |
| 英文描述： | CIR 55C 55#16 PIN PLUG |
| 中文描述： | 對角線毫米（類型1 / 2）CCD圖像傳感器的無線電咨詢委員會黑與白錄相機(jī) |
| 文件頁數(shù)： | 4/20頁 |
| 文件大小： | 218K |
| 代理商： | ICX039BLA |
– 4 –
ICX039DLA
Item
V
DD
V
RD
V
GG
V
SS
V
L
V
DSUB
V
SUB
V
SUB
14.55
14.55
1.75
6.0
–3
15.0
15.0
2.0
3
4
15.45
15.45
2.25
14.0
+3
V
V
V
V
%
V
RD
= V
DD
5
5
Symbol
Min.
Typ.
Max.
Unit
Remarks
Bias Conditions 2 [when used in substrate bias external adjustment mode]
Output circuit supply voltage
Reset drain voltage
Output circuit gate voltage
Output circuit source
Protective transistor bias
Substrate bias circuit supply voltage
Substrate voltage adjustment range
Substrate voltage adjustment precision
3
V
L
setting is the V
VL
voltage of the vertical transfer clock waveform, or the same power supply as the V
L
power supply for the V driver should be used. (When CXD1267AN is used.)
Connect to GND or leave open.
The setting value of the substrate voltage (V
SUB
) is indicated on the back of the image sensor by a special
code. When adjusting the substrate voltage externally, adjust the substrate voltage to the indicated
voltage. The adjustment precision is ±3%. However, this setting value has not significance when used in
substrate bias internal generation mode.
4
5
V
SUB
code — one character indication
Code and optimal setting correspond to each other as follows.
DC Characteristics
Item
Output circuit supply current
I
DD
5.0
10.0
mA
Symbol
Min.
Typ.
Max.
Unit
Remarks
V
SUB
code
Optimal setting 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5
10.0 10.5 11.0 11.5 12.0 12.5 13.0 13.5 14.0
E
f
G
h
J
K
L
m
N
P
Q
R
S
T
U
V
W
<Example> "L"
→
V
SUB
= 9.0V
Item
V
DD
V
RD
V
GG
V
SS
V
L
V
DSUB
φ
SUB
14.55
14.55
1.75
Grounded with 390
resistor
14.55
15.0
15.0
2.0
1
15.0
2
15.45
15.45
2.25
15.45
V
V
V
V
V
RD
= V
DD
Symbol
Min.
Typ.
Max.
Unit
Remarks
Bias Conditions 1 [when used in substrate bias internal generation mode]
Output circuit supply voltage
Reset drain voltage
Output circuit gate voltage
Output circuit source
Protective transistor bias
Substrate bias circuit supply voltage
Substrate clock
1
V
L
setting is the V
VL
voltage of the vertical transfer clock waveform, or the same power supply as the V
L
power supply for the V driver should be used. (When CXD1267AN is used.)
Do not apply a DC bias to the substrate clock pin, because a DC bias is generated within the CCD.
2
Grounded with 390
resistor
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PDF描述 |
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| ICX039BLB | CIR 55C 55#16 PIN PLUG |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICX039BLB | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Diagonal 8mm (Type 1/2) CCD Image Sensor for CCIR Black-and-White Video Cameras |
| ICX039BNA | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Diagonal 8mm (Type 1/2) CCD Image Sensor for PAL Color Video Cameras |
| ICX039BNB | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Diagonal 8mm (Type 1/2) CCD Image Sensor for PAL Color Video Cameras |
| ICX039DLA | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Diagonal 8mm (Type 1/2) CCD Image Sensor for CCIR Black-and-White Video Cameras |
| ICX039DLB | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Diagonal 8mm (Type 1/2) CCD Image Sensor for CCIR Black-and-White Video Cameras |
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