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| 型號： | ICSSSTVA16859YGLF-T |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 鎖存器 |
| 英文描述： | SSTV SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO64 |
| 封裝： | 6.10 MM WIDTH, 0.50 MM PITCH, MO-153, TSSOP-64 |
| 文件頁數(shù)： | 1/10頁 |
| 文件大?。?/td> | 104K |
| 代理商： | ICSSSTVA16859YGLF-T |
Integrated
Circuit
Systems, Inc.
ICSSSTVA16859
0882C—09/23/04
Recommended Applications:
DDR Memory Modules:
- DDRI (PC1600, PC2100)
- DDR333 (PC2700)
- DDRI-400 (PC3200)
Provides complete DDR DIMM solution with
ICS93V857 or ICS95V857
SSTL_2 compatible data registers
Product Features:
Differential clock signals
Meets SSTL_2 signal data
Supports SSTL_2 class I specifications on outputs
Low-voltage operation
- VDD = 2.3V to 2.7V
Available in 64 pin TSSOP and 56 pin MLF packages
Exceeds ICSSSTVN16859 performance
DDR 13-Bit to 26-Bit Registered Buffer
Truth Table
1
Block Diagram
Notes:
1.
H = "High" Signal Level
L = "Low" Signal Level
↑ = Transition "Low"-to-"High"
↓ = Transition "High"-to-"Low"
X = Don't Care
2.
Output level before the indicated steady state
input conditions were established.
s
t
u
p
n
Is
t
u
p
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u
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Q
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T
E
S
E
RK
L
C#
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L
CD
Q
L
r
o
X
g
n
i
t
a
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l
F
r
o
X
g
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t
a
o
l
F
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g
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l
F
L
H
↑↓
HH
H
↑↓
LL
HH
r
o
LH
r
o
LX
Q0 )
2
(
Pin Configurations
64-Pin TSSOP
6.10 mm. Body, 0.50 mm. pitch
CLK
CLK#
D1
VREF
RESET#
To 12 Other Channels
Q1A
Q1B
CLK
R
D1
56-Pin VFQFN (MLF2)
ADVANCE INFORMATION documents contain information on products in the formative or design phase development. Characteristic data and other specifications are design goals.
ICS reserves the right to change or discontinue these products without notice. Third party brands and names are the property of their respective owners.
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25
26
27
28
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32
64
63
62
61
60
59
58
57
56
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53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
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35
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33
Q13A
Q12A
Q11A
Q10A
Q9A
VDDQ
GND
Q8A
Q7A
Q6A
Q5A
Q4A
Q3A
Q2A
GND
Q1A
Q13B
VDDQ
Q12B
Q11B
Q10B
Q9B
Q8B
Q7B
Q6B
GND
VDDQ
Q5B
Q4B
Q3B
Q2B
Q1B
VDDQ
GND
D13
D12
VDD
VDDQ
GND
D11
D10
D9
GND
D8
D7
RESET#
GND
CLK#
CLK
VDDQ
VDD
VREF
D6
GND
D5
D4
D3
GND
VDDQ
VDD
D2
D1
GND
VDDQ
ICSSSTVA16859
Q7A
Q6A
Q5A
Q4A
Q3A
Q2A
Q1A
Q13B
VDDQ
Q12B
Q11B
Q10B
Q9B
Q8B
1
14
15
28
29
43
42
56
D10
D9
D8
D7
RESET#
GND
CLK#
CLK
VDDQ
VDD
VREF
D6
D5
D4
Q8A
VDDQ
Q9A
Q10A
Q11A
Q12A
Q13A
VDDQ
GND
D13
D12
VDD
VDDQ
D11
Q7B
Q6B
VDDQ
Q5B
Q4B
Q3B
Q2B
Q1B
VDDQ
D1
D2
VDD
VDDQ
D3
ICSSSTVA16859
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