- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄65536 > ICSSSTVA16857YGLF-T SSTV SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO48 PDF資料下載
參數(shù)資料
| 型號： | ICSSSTVA16857YGLF-T |
| 元件分類： | 鎖存器 |
| 英文描述： | SSTV SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO48 |
| 封裝： | 6.10 MM WIDTH, 0.50 MM PITCH, MO-153, LEAD FREE, TSSOP-48 |
| 文件頁數(shù)： | 3/9頁 |
| 文件大?。?/td> | 73K |
| 代理商： | ICSSSTVA16857YGLF-T |
3
ICSSSTVA16857
0932A—05/12/04
Absolute Maximum Ratings
Storage Temperature . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 to 3.6V
Input Voltage
1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
-0.5 to VDD +0.5
Output Voltage
1,2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
-0.5 to VDDQ +0.5
Input Clamp Current . . . . . . . . . . . . . . . . . . . . ±50 mA
Output Clamp Current . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous Output Current . . . . . . . . . . . . . . . ±50 mA
VDD, VDDQ or GND Current/Pin . . . . . . . . . . . . ±100 mA
Package Thermal Impedance
3
. . . . . . . . . . . . . . . .
55°C/W
Stresses above those listed under
Absolute Maximum Ratings may cause permanent damage to the device.These ratings
are stress specifications only and functional operation of the device at these or any other conditions above those listed in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect product reliability.
Notes:
1. The input and output negative voltage
ratings may be excluded if the input
and output clamp ratings are observed.
2. This current will flow only when the
output is in the high state level
V0 >VDDQ.
3. The package thermal impedance is
calculated
in
accordance
with
JESD 51.
Recommended Operating Conditions - DDRI/DDR333 (PC1600, PC2100, PC2700)
PARAMETER
MIN
TYP
MAX
UNITS
VDD
2.3
2.5
2.7
VDDQ
2.3
2.5
2.7
VREF
1.15
1.25
1.35
VTT
VREF - 0.04
VREF
VREF + 0.04
VI
Input Voltage
0
VDDQ
VIH (DC)
DC Input High Voltage
VREF + 0.15
VIH (AC)
AC Input High Voltage
VREF + 0.31
VIL (DC)
DC Input Low Voltage
VREF - 0.15
VIL (DC)
AC Input Low Voltage
VREF - 0.31
VIH
Input High Voltage Level
1.7
VIL
Input Low Voltage Level
0.7
VICR
Common mode Input Range
0.97
1.53
VID
Differential Input Voltage
0.36
VIX
(VDDQ/2) - 0.2
(VDDQ/2) + 0.2
IOH
-16
IOL
16
TA
070
°C
1Guaranteed by design, not 100% tested in production.
Operating Free-Air Temperature
RESET#
CLK, CLK#
V
Termination Voltage
Cross Point Voltage of Differential Clock
Pair
High-Level Output Current
Low-Level Output Current
Data Inputs
mA
DESCRIPTION
Supply Voltage
I/O Supply Voltage
Reference Voltage
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ICSSSTVA32852CH-T | SSTV SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA114 |
| ICSSSTVA32852YHLF-T | SSTV SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA114 |
| ICSSSTVA32852YHLF-T | SSTV SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA114 |
| ICSSSTVF16859AYKLF-T | SSTV SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, QCC56 |
| ICSSSTVF16859AYGLF-T | SSTV SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO64 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICSSSTVA16859B | 制造商:ICS 制造商全稱:ICS 功能描述:DDR 13-Bit to 26-Bit Registered Buffer |
| ICSSSTVA16859BGLF-T | 制造商:ICS 制造商全稱:ICS 功能描述:DDR 13-Bit to 26-Bit Registered Buffer |
| ICSSSTVA16859BG-T | 制造商:ICS 制造商全稱:ICS 功能描述:DDR 13-Bit to 26-Bit Registered Buffer |
| ICSSSTVA16859BKLF-T | 制造商:ICS 制造商全稱:ICS 功能描述:DDR 13-Bit to 26-Bit Registered Buffer |
| ICSSSTVA16859BK-T | 制造商:ICS 制造商全稱:ICS 功能描述:DDR 13-Bit to 26-Bit Registered Buffer |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。