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參數(shù)資料
| 型號(hào)： | ICSSSTV16859YKLF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 鎖存器 |
| 英文描述： | SSTV SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, CQCC56 |
| 封裝： | VFQFN-56 |
| 文件頁(yè)數(shù)： | 8/8頁(yè) |
| 文件大?。?/td> | 91K |
| 代理商： | ICSSSTV16859YKLF |
8
ICSSSTV16859
0003G—05/21/02
Ordering Information
ICSSSTV16859yK
Designation for tape and reel packaging
Pattern Number (2 or 3 digit number for parts with ROM code
patterns)
Package Type
Revision Designator (will not correlate with datasheet revision)
Device Type (consists of 3 or 4 digit numbers)
Prefix
ICS, AV = Standard Device
Example:
ICS XXXX y K - PPP - T
56 pin MLF2
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相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ICSSSTV32852AHLF | SSTV SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA114 |
| ICSSSTVA16857YG-T | SSTV SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO48 |
| ICSSSTVA16857YG-T | SSTV SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO48 |
| ICSSSTVA16857YGLF-T | SSTV SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO48 |
| ICSSSTVA32852CH-T | SSTV SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA114 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICSSSTV32852 | 制造商:ICS 制造商全稱:ICS 功能描述:DDR 24-Bit to 48-Bit Registered Buffer |
| ICSSSTV32852YHT | 制造商:ICS 制造商全稱:ICS 功能描述:DDR 24-Bit to 48-Bit Registered Buffer |
| ICSSSTVA16857 | 制造商:ICS 制造商全稱:ICS 功能描述:DDR 14-Bit Registered Buffer |
| ICSSSTVA16857YGLF-T | 制造商:ICS 制造商全稱:ICS 功能描述:DDR 14-Bit Registered Buffer |
| ICSSSTVA16859B | 制造商:ICS 制造商全稱:ICS 功能描述:DDR 13-Bit to 26-Bit Registered Buffer |
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