- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄67710 > ICSSSTUF32864AYH-T (INTEGRATED DEVICE TECHNOLOGY INC) SSTU SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA96 PDF資料下載
參數(shù)資料
| 型號(hào)： | ICSSSTUF32864AYH-T |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 鎖存器 |
| 英文描述： | SSTU SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA96 |
| 封裝： | MO-205CC, LFBGA-96 |
| 文件頁數(shù)： | 9/11頁 |
| 文件大小： | 111K |
| 代理商： | ICSSSTUF32864AYH-T |
7
ICSSSTUF32864A
0987B—09/28/04
Electrical Characteristics - DC
TA = 0 - 70°C; VDD = 2.5 +/-0.2V (unless otherwise stated)
SYMBOL
PARAMETERS
VDD
MIN
TYP
MAX
UNITS
VIK
II = -18mA
-1.2
VOH
IOH = -6mA
1.7V
1.2
VOL
IOL = 6mA
1.7V
0.5
II
All Inputs
VI = VDD or GND
1.9V
-5
5
A
Standby (Static)
RESET# = GND
100
A
Operating (Static)
VI = VIH(AC) or VIL(AC),
RESET# = VDD
TBD
mA
Dynamic operating
(clock only)
RESET# = VDD,
VI = VIH(AC) or VIL(AC),
CLK and CLK# switching
50% duty cycle.
TBD
/clock
MHz
Dynamic Operating
(per each data input)
1:1 mode
TBD
Dynamic Operating
(per each data input)
1:2 mode
TBD
Data Inputs
2.5
3.5
CLK and CLK#
2
3
RESET#
2.5
Notes:
1 - Guaranteed by design, not 100% tested in production.
CONDITIONS
VI = VREF ±350mV
VICR = 1.25V, VI(PP) = 360mV
pF
A/ clock
MHz/data
V
1.9V
1.8V
Ci
VI = VDD or GND
IDDD
RESET# = VDD,
VI = VIH(AC) or VIL (AC),
CLK and CLK# switching
50% duty cycle. One data
input switching at half
clock frequency, 50%
duty cycle
IO = 0
IDD
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ICSSSTUF32864AYHLF-T | SSTU SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA96 |
| ICSSSTUF32864AYHLF-T | SSTU SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA96 |
| ICSSSTUF32864YHLFT | SSTU SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA96 |
| ICSSSTUF32866EHT | SSTU SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA96 |
| ICSSSTUF32866EHLFT | SSTU SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA96 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICSSSTV16857 | 制造商:ICS 制造商全稱:ICS 功能描述:DDR 14-Bit Registered Buffer |
| ICSSSTV16857CG-T | 制造商:ICS 制造商全稱:ICS 功能描述:DDR 14-Bit Registered Buffer |
| ICSSSTV16857YG-T | 制造商:ICS 制造商全稱:ICS 功能描述:DDR 14-Bit Registered Buffer |
| ICSSSTV16857YL-T | 制造商:ICS 制造商全稱:ICS 功能描述:DDR 14-Bit Registered Buffer |
| ICSSSTV16859 | 制造商:ICS 制造商全稱:ICS 功能描述:DDR 13-Bit to 26-Bit Registered Buffer |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。