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參數(shù)資料
| 型號： | ICSSSTU32864YHT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 鎖存器 |
| 英文描述： | SSTU SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA96 |
| 封裝： | MO-205CC, LFBGA-96 |
| 文件頁數(shù)： | 9/11頁 |
| 文件大小： | 110K |
| 代理商： | ICSSSTU32864YHT |
7
ICSSSTU32864
0727C—04/15/04
Electrical Characteristics - DC
TA = 0 - 70°C; VDD = 2.5 +/-0.2V, VDDQ=2.5 +/-0.2V; (unless otherwise stated)
SYMBOL
PARAMETERS
VDDQ
MIN
TYP
MAX
UNITS
VIK
II = -18mA
-1.2
IOH = -100A
1.7V - 1.9V
VDDQ -
0.2
IOH = -16mA
1.7V
1.95
IOL = 100A
1.7V - 1.9V
0.2
IOL = 16mA
1.7V
0.35
II
All Inputs
VI = VDD or GND
1.9V
±5
A
Standby (Static)
RESET# = GND
0.01
A
Operating (Static)
VI = VIH(AC) or VIL(AC),
RESET# = VDD
TBD
mA
Dynamic operating
(clock only)
RESET# = VDD,
VI = VIH(AC) or VIL(AC),
CLK and CLK# switching
50% duty cycle.
TBD
/clock
MHz
Dynamic Operating
(per each data input)
RESET# = VDD,
VI = VIH(AC) or VIL (AC),
CLK and CLK# switching
50% duty cycle. One data
input switching at half
clock frequency, 50%
duty cycle
TBD
A/ clock
MHz/data
rOH
Output High
rOL
Output Low
rO(D)
[rOH - rOL] each
separate bit
4
Data Inputs
2.5
3.5
CLK and CLK#
2
3
RESET#
2.5
Notes:
1 - Guaranteed by design, not 100% tested in production.
VOH
VOL
IDD
IDDD
IO = 0
CONDITIONS
VI = VREF ±350mV
VICR = 1.25V, VI(PP) = 360mV
pF
IOH = -20mA
V
IOL = 20mA
1.8V
1.9V
Ci
VI = VDDQ or GND
IO = 20mA, TA = 25° C
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