參數(shù)資料
型號: ICSLV810FIT
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時鐘及定時
英文描述: 810 SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
封裝: 0.209 INCH, SSOP-20
文件頁數(shù): 1/14頁
文件大?。?/td> 299K
代理商: ICSLV810FIT
DATASHEET
BUFFER/CLOCK DRIVER
ICSLV810
IDT / ICS BUFFER/CLOCK DRIVER
1
ICSLV810
REV F 101305
Description
The ICSLV810 is a low skew 1.5 V to 2.5 V, 1:10 fanout
buffer. This device is specifically designed for data
communications clock management. The large fanout from
a single input line reduces loading on the input clock. The
TTL level outputs reduce noise levels on the part. Typical
applications are clock and signal distribution.
Features
Packaged in 20-pin QSOP/SSOP
Split 1:10 fanout Buffer
Maximum skew between outputs of different packages
0.75 ns
Max propagation delay of 3.8 ns
Operating voltage of 1.5 V to 2.5 V on Bank A
Operating voltage of 1.5 V to 2.5 V on Banks B and C
Advanced, low power, CMOS process
Industrial temperature range -40° C to +85° C
3.3 V tolerant input when VDDA=2.5 V
Available in Pb (lead) free packaging
Block Diagram
CLK 1
CLK 2
CLK 3
CLK 4
CLK 5
CLK 6
CLK 7
CLK 8
CLK 9
CLK 10
VDDA
VDDB
CLKIN
VDDC
相關(guān)PDF資料
PDF描述
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