參數(shù)資料
型號(hào): ICS952601yGLFT
英文描述: Programmable Timing Control Hub⑩ for Next Gen P4⑩ processor
中文描述: 可編程定時(shí)控制中心⑩處理器的下一代?、?/td>
文件頁(yè)數(shù): 22/24頁(yè)
文件大小: 181K
代理商: ICS952601YGLFT
22
Integrated
Circuit
Systems, Inc.
ICS952601
0701G—10/13/04
PCI_STOP Asserted
SRC_Stop = Tristate, SRC_Pwrdwn = Tristate
PCI_Stop#
1.8mS
PWRDWN#
PCI (Free Running)
CPU (Free Running)
CPU# (Free Running)
SRC (Stoppable)
SRC# (Stoppable)
Notes:
1. When SRC_Pwrdwn and SRC_Stop are set to tristate, the clock chip will tristate outputs during the assertion of PCI_Stop#
and PWRDWN#.
2. In the case that PCI_Stop# is de-asserted during the 1.8mS PWRDWN# de-assertion resume delay, the clock chip can
sample the PCI_Stop# high with the internal rising edges of CPU clock#. This will result in SRC clocks resuming
immediately after the 1.8mS window expires. This applies to all control register bit changes as well.
3. Tristate outputs are pulled low by output termination resistors as shown here.
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ICS952601yFLFT Programmable Timing Control Hub⑩ for Next Gen P4⑩ processor
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