參數(shù)資料
型號(hào)： ICS952302
英文描述： Frequency Generator for TransmetaTM
中文描述： 頻率發(fā)生器TransmetaTM
文件頁(yè)數(shù)： 2/15頁(yè)
文件大?。?/td> 128K
代理商： ICS952302
2
ICS952302
0957B—10/05/04
Pin Descriptions
PIN #
PIN NAME
PIN
TYPE
PWR
OUT
PWR
IN
OUT
PWR
OUT
OUT
PWR
OUT
OUT
OUT
OUT
PWR
OUT
PWR
N/C
N/C
PWR
IN
DESCRIPTION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
VDDREF
REF0
GNDREF
X1
X2
VDDPCI
PCICLK_F0
PCICLK_F1
GNDPCI
PCICLK0
PCICLK1
PCICLK_F2
PCICLK_F3
VDDPCI
PCICLK2
GNDPCI
N/C
N/C
VDDCOR
PCI_STOP#
Ref, XTAL power supply, nominal 3.3V
14.318 MHz reference clock.
Ground pin for the REF outputs.
Crystal input, Nominally 14.318MHz.
Crystal output, Nominally 14.318MHz
Power supply for PCI clocks, nominal 3.3V
Free running PCI clock not affected by PCI_STOP# .
Free running PCI clock not affected by PCI_STOP# .
Ground pin for the PCI outputs
PCI clock output.
PCI clock output.
Free running PCI clock not affected by PCI_STOP# .
Free running PCI clock not affected by PCI_STOP# .
Power supply for PCI clocks, nominal 3.3V
PCI clock output.
Ground pin for the PCI outputs
No Connection.
No Connection.
3.3V power for the PLL core.
Stops all PCICLKs at logic 0 level, when low. Free running PCICLKs are not effected by this input.
21
**PD#
IN
Asynchronous active low input pin, with 120Kohm internal pull-up resistor, used to power down the device. The
internal clocks are disabled and the VCO and the crystal are stopped.
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
GND48
SDATA
SCLK
48MHZ_0
48MHZ_1
VDD48
GND48
N/C
N/C
N/C
27MHZ
GND
VDD27
N/C
VDD
N/C
PWR
I/O
IN
OUT
OUT
PWR
PWR
N/C
N/C
N/C
OUT
PWR
PWR
N/C
PWR
N/C
Ground pin for the 48MHz outputs
Data pin for SMBus circuitry, 5V tolerant.
Clock pin of SMBus circuitry, 5V tolerant.
48MHz clock output.
48MHz clock output.
Power pin for the 48MHz output.3.3V
Ground pin for the 48MHz outputs
No Connection.
No Connection.
No Connection.
27.0000MHz Video Clock for ATi Chipset
Ground pin.
Power pin for the 27MHz output.3.3V
No Connection.
Power supply, nominal 3.3V
No Connection.
Active high input for enabling Memory Channel outputs.
0 = tri-state outputs, 1= enable outputs
No Connection.
Ground pin.
Stops all CPUCLK, except those set to be free running clocks
Free running CPU clock. Not affected by the CPU_STOP#.
CPU clock outputs. 3.3V
Ground pin for the CPU outputs
CPU clock outputs. 3.3V
No Connection.
Supply for CPU clocks, 3.3V nominal
14.318 MHz reference clock.
** No diode clamp to VDD.
38
OE*
IN
39
40
41
42
43
44
45
46
47
48
N/C
GND
N/C
PWR
IN
OUT
OUT
PWR
OUT
N/C
PWR
OUT
CPU_STOP#
CPUCLK_F
CPUCLK1
GNDCPU
CPUCLK0
N/C
VDDCPU
REF1
* Internal Pull-Up Resistor
相關(guān)PDF資料
PDF描述
ICS952302yGLF-T Frequency Generator for TransmetaTM
ICS952601yGLFT Programmable Timing Control Hub⑩ for Next Gen P4⑩ processor
ICS952601 16-Bit Buffers/Drivers With 3-State Outputs 48-TVSOP -40 to 85
ICS952601yFLFT Programmable Timing Control Hub⑩ for Next Gen P4⑩ processor
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ICS952302AG 功能描述:IC FREQ GENERATOR 48-TSSOP RoHS:否 類(lèi)別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專(zhuān)用 系列:- 標(biāo)準(zhǔn)包裝:28 系列:- 類(lèi)型:時(shí)鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時(shí)鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無(wú)/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:64-TFSOP （0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件
ICS952302AGT 功能描述:IC FREQ GENERATOR 48-TSSOP RoHS:否 類(lèi)別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專(zhuān)用 系列:- 標(biāo)準(zhǔn)包裝:28 系列:- 類(lèi)型:時(shí)鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時(shí)鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無(wú)/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:64-TFSOP （0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件
ICS952302YGLF-T 制造商:ICS 制造商全稱(chēng):ICS 功能描述:Frequency Generator for TransmetaTM
ICS952303AK 制造商:INT_CIR_SYS 功能描述:
ICS952601 制造商:IDT 制造商全稱(chēng):Integrated Device Technology 功能描述:Programmable Timing Control HubTM for Next Gen P4TM Processor
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