參數(shù)資料
型號(hào): ICS952004
英文描述: 16-Bit Buffers/Drivers With 3-State Outputs 48-TSSOP -40 to 85
中文描述: 可編程定時(shí)控制中心,為小四至⑩⑩處理器
文件頁(yè)數(shù): 12/19頁(yè)
文件大小: 173K
代理商: ICS952004
12
Third party brands and names are the property of their respective owners.
Integrated
Circuit
Systems, Inc.
ICS952004
Absolute Maximum Ratings
Core Supply Voltage . . . . . . . . . . . . . . . . . . . . . . 4.6 V
I/O Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . 3.6V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND –0.5 V to V
DD
+0.5 V
Ambient Operating Temperature . . . . . . . . . . . . 0°C to +70°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Case Temperature . . . . . . . . . . . . . . . . . . . . . . . . 115°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are
stress specifications only and functional operation of the device at these or any other conditions above those listed in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect product reliability.
Electrical Characteristics - Input/Supply/Common Output Parameters
T
A
= 0 - 70C; Supply Voltage V
DD
= 3.3 V +/-5%
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Input High Voltage
V
IH
2
V
DD
+0.3
V
Input Low Voltage
V
IL
V
SS
-0.3
0.8
V
Input High Current
I
IH
V
IN
= V
DD
-5
5
mA
I
IL1
V
IN
= 0 V; Inputs with no pull-up
resistors
V
IN
= 0 V; Inputs with pull-up
resistors
-5
mA
I
IL2
-200
Operating Supply Current
I
DD3.3OP
C
L
= Full load
215
280
mA
Powerdown Current
Input Frequency
Pin Inductance
I
DD3.3PD
F
i
L
pin
C
IN
C
OUT
C
INX
IREF=2.32 mA
V
DD
= 3.3 V
16
25
mA
MHz
nH
pF
pF
pF
14.318
7
5
6
Logic Inputs
Output pin capacitance
X1 & X2 pins
From PowerUp or deassertion of
PowerDown to 1st clock.
27
45
Clk Stabilization
1,2
T
STAB
1.3
1.8
ms
CPU to SDRAM SKEW
0.4
1
ns
t
PZH
,t
PZL
Output enable delay (all outputs)
1
10
ns
t
PHZ
,t
PLZ
Output disable delay (all outputs)
1
10
ns
1
Guaranteed by design, not 100% tested in production.
2
See timing diagrams for buffered and un-buffered timing requirements.
Delay
1
Input Capacitance
1
Input Low Current
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