參數(shù)資料
型號: ICS951412YFLFT
英文描述: System Clock Chip for ATI RS480 K8-based Systems
中文描述: 系統(tǒng)時鐘芯片為ATI RS480基于K8系統(tǒng)
文件頁數(shù): 11/19頁
文件大?。?/td> 283K
代理商: ICS951412YFLFT
11
ICS951412
0883G—12/08/04
Electrical Characteristics - K8 Push Pull Differential Pair
T
A
= 0 - 70°C; V
DD
= 3.3 V +/-5%; C
L
=AMD64 Processor Test Load
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP MAX UNITS
NOTES
Rising Edge Rate
δ
V
t
2
10
V/ns
1
Falling Edge Rate
δ
V
t
2
10
V/ns
1
Differential Voltage
Change in V
DIFF_DC
Magnitude
V
DIFF
0.4
1.25
2.3
V
1
V
DIFF
-150
150
mV
1
Common Mode Voltage
V
CM
1.05
1.25 1.45
V
1
Change in Common
Mode Voltage
V
CM
-200
200
mV
1
Jitter, Cycle to cycle
t
jcyc-cyc
Measurement from differential
wavefrom. Maximum difference of cycle
time between 2 adjacent cycles.
Measured using the JIT2 software
package with a Tek 7404 scope.
TIE (Time Interval Error) measurement
technique:
Sample resolution = 50 ps,
Sample Duration = 10 μs
Measurement from differential
wavefrom
Average value during switching
transition. Used for determining series
termination value.
Measurement from differential
wavefrom
0
100
200
ps
1
Jitter, Accumulated
t
ja
-1000
1000
1,2,3
Duty Cycle
d
t3
45
53
%
1
Output Impedance
R
ON
15
35
55
1
Group Skew
t
src-skew
250
ps
1
1
Guaranteed by design and characterization, not 100% tested in production.
2
All accumulated jitter specifications are guaranteed assuming that REF is at 14.31818MHz
3
Spread Spectrum is off
Measured at the AMD64 processor's
test load. 0 V +/- 400 mV (differential
measurement)
Measured at the AMD64 processor's
test load. (single-ended measurement)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ICS951412YGLFT 制造商:ICS 制造商全稱:ICS 功能描述:System Clock Chip for ATI RS480 K8-based Systems
ICS951413 制造商:ICS 制造商全稱:ICS 功能描述:Programmable System Clock Chip for ATI RS400 P4-based Systems
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