參數(shù)資料
型號: ICS951403
英文描述: AMD-K7 System Clock Chip
中文描述: AMD的k7的系統(tǒng)時鐘芯片
文件頁數(shù): 8/18頁
文件大?。?/td> 639K
代理商: ICS951403
8
ICS951403
0486B—02/23/04
Electrical Characteristics - REF
T
A
= 0 - 70°C; VDD=3.3V +/-5%; C
L
= 10-30 pF (unless otherwise specified)
PARAMETER
SYMBOL
Output High
Voltage
CONDITIONS
MIN
TYP
MAX
UNITS
V
OH5
I
OH
= -18mA
2.4
V
Output Low Voltage
V
OL5
I
OL
= 18mA
0.4
V
Output High Current
I
OH5
V OH = 2.0 V,
-19
mA
Output Low Current
I
OL5
V
OL
= 0.8V
19
mA
Rise Time
Fall Time
Duty Cycle
Jitter
1
Guaranteed by design, not 100% tested in production.
t
r5
t
f5
d
t1
V
OL
= 0.4 V, V
OH
= 2.4 V
V
OH
= 2.4 V, V
OL
= 0.4 V
V
T
= 50%
V
T
= 1.5 V
0.85
1.03
54
521
4
4
ns
ns
%
ps
1
45
55
1000
t
jcyc-cyc5
Electrical Characteristics - CPU (Open Drain)
T
A
= 0 - 70°C; VDD=3.3V +/-5%; C
L
= 2pF (unless otherwise specified)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Output Impedance
Zo
V
O
= V
x
Output High
Voltage
Output Low
Voltage
Output Low
Current
Fall Time
Differential
voltage_AC
V
OH2B
Termination to Vpull_up (external)
1
1.2
V
V
OL2B
Termination to Vpull_up (external)
0.4
I
OL2B
V
OL
= 0.3V
18
mA
t
f2B
V
OH
= 1.2V V
OL
= 0.3V
0.8
0.9
ps
V
DIF
Note 2
Vtpullup
(external)+0
.6
Vtpullup
(external)+0
.6
ps
Differential
voltage_DC
Differential
Crossover Voltage
Duty Cycle
Skew
V
DIF
Note 2
ps
V
X
True rise to compl. Fall
1.37
1.5
V
d
t2B
t
sk2B
V
T
= 50%
V
T
= 50%
45
49.3
48
55
200
%
ps
Jitter, Cycle to cycle
t
jcyc-cyc
1
V
T
= Vx
130
250
ps
1
Guaranteed by design, not 100% tested in production.
2
V
DIF
specifies the minimum input differential voltages (VTR-VCP) required for switching, where VTR is the "true"
input level and VCP is the "complement" input level.
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