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參數(shù)資料
| 型號： | ICS94201DFLFT |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 18/19頁 |
| 文件大小： | 0K |
| 描述： | IC FREQ GENERATOR PROGR 56-SSOP |
| 標準包裝： | 1,000 |
| 類型： | 時鐘/頻率發(fā)生器，多路復(fù)用器 |
| PLL： | 是 |
| 主要目的： | Intel CPU 服務(wù)器 |
| 輸入： | 晶體 |
| 輸出： | 時鐘 |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 2:29 |
| 差分 - 輸入:輸出： | 無/無 |
| 頻率 - 最大： | 500.03MHz |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 56-BSSOP（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 56-SSOP |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | 94201DFLFT |
8
ICS94201
0428B - 11/28/05
Byte 13: ICS Reserved Register
Byte 15: VCO Frequency Control Register
Note: The decimal representation of these 9 bits (Byte 15 bit
[7:0] & Byte 14 bit [7] ) + 8 is equal to the VCO divider value.
For example if VCO divider value of 36 is desired, user need
to program 36 - 8 = 28, namely, 0, 00011100 into byte 15 bit
& byte 14 bit 7.
Note: DON'T write a '1' into this register, it will
cause malfunction.
Byte 14: VCO Frequency Control Register
Note: The decimal representation of these 7 bits (Byte 14
[6:0]) + 2 is equal to the REF divider value .
To program the VCO frequency for over-clocking.
0. Before trying to program our clock manually, consider using ICS provided software utilities for easy programming.
1. Select the frequency you want to over-clock from with the desired gear ratio (i.e. CPU:SDRAM:3V66:PCI ratio) by writing to
byte 0, or using initial hardware power up frequency.
2. Write 0001, 1001 (19H) to byte 6 for readback of 25 bytes (byte 0-24).
3. Read back byte 16-24 and copy values in these registers.
4. Re-initialize the write sequence.
5. Write a '1' to byte 8 bit 7 indicating you want to use byte 14 and 15 to control the VCO frequency.
6. Write to byte 14 & 15 with the desired VCO & REF divider values.
7. Write to byte 16 to 24 with the values you copy from step 3. This maintains the output divider mux controls the same gear ratio.
8. The above procedure is only needed when changing the VCO for the 1st pass. If VCO frequency needs to be changed again,
user only needs to write to byte 14 and 15 unless the system is to reboot.
VCO Programming Constrains
VCO Frequency ...................... 150MHz to 500MHz
VCO Divider Range ................ 8 to 519
REF Divider Range ................. 2 to 129
Phase Detector Stability .......... 0.3536 to 1.4142
Useful Formula
VCO Frequency = 14.31818 x VCO/REF divider value
Phase Detector Stabiliy = 14.038 x (VCO divider value)
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| ICS94201DFT | 功能描述:IC FREQ GENERATOR PROGR 56-SSOP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:- 標準包裝:1,500 系列:- 類型:時鐘緩沖器/驅(qū)動器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT |
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| ICS94203 | 制造商:ICS 制造商全稱:ICS 功能描述:Programmable System Frequency Generator for PII/III⑩ |
| ICS94203F-T | 制造商:ICS 制造商全稱:ICS 功能描述:Peripheral IC |
| ICS94203YF-T | 制造商:ICS 制造商全稱:ICS 功能描述:Programmable System Frequency Generator for PII/III⑩ |
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