參數(shù)資料
型號: ICS93705YF-T
英文描述: DDR Phase Lock Loop Zero Delay Clock Buffer
中文描述: 復(fù)員鎖相環(huán)零延遲時鐘緩沖器
文件頁數(shù): 4/7頁
文件大?。?/td> 65K
代理商: ICS93705YF-T
4
ICS93705
0418C—08/08 /02
Absolute Maximum Ratings
Supply Voltage (VDD & AVDD). . . . . . . . . . . -0.5V to 3.6V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . GND –0.5 V to V
DD
+0.5 V
Ambient Operating Temperature . . . . . . . . . . 0°C to +85°C
Storage Temperature . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Stresses above those listed under
Absolute Maximum Ratings
may cause permanent damage to the device. These
ratings are stress specifications only and functional operation of the device at these or any other conditions above those
listed in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions
for extended periods may affect product reliability.
Electrical Characteristics - Input / Supply / Common Output Parameters
T
A
= 0 - 70°C; Supply Voltage V
DD
= 2.5 V +/-0.2V (unless otherwise stated)
PARAMETER
Input High Current
SYMBOL
I
IH
I
IL
I
DD2.5
I
DDPD
I
OH
I
OL
CONDITIONS
MIN
TYP
MAX
UNITS
μ
A
μ
A
mA
μ
A
mA
V
I
= V
DD
or GND
V
I
= V
DD
or GND
C
L
= 0 pF at 133 MHz
C
L
= 0 pF
V
DD
= 2.3V, V
OUT
= 1V
V
DD
= 2.3V, V
OUT
= 1.2V
Input Low Current
245
300
100
Output High Current
-43
-18
Output High Current
26
43
mA
High Impedance Output
Current
I
OZ
V
DD
= 2.7V, V
OUT
= V
DD
or GND
10
μ
A
Input Clamp Voltage
V
IK
Iin = -18 mA;
V
V
DD
= min to max, I
OH
= -1mA
V
DD
= 2.3V, I
OH
= -12mA
V
DD
= min to max, I
OH
= 1mA
V
DD
= 2.3V, I
OH
= 12mA
V
I
= V
DD
or GND
V
I
= V
DD
or GND
2.1
2.42
V
1.87
V
V
OL
0.04
0.1
V
0.35
0.6
V
Input Capacitance
1
Output Capacitance
1
C
IN
C
OUT
pF
3
pF
1
Guaranteed by design, not 100% tested in production.
Operating Supply Current
V
OH
Low-level Output Voltage
High-level Output Voltage
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