參數(shù)資料
型號: ICS9248-99
英文描述: Replaced by SN74ABT16373A : 16-Bit Transparent D-Type Latches With 3-State Outputs 48-TSSOP -40 to 85
中文描述: 頻率發(fā)生器
文件頁數(shù): 8/11頁
文件大小: 100K
代理商: ICS9248-99
8
ICS9248-185
PCI_STOP# Timing Diagram
PCI_STOP# is an asynchronous input to the
ICS9248-185
. It is used to turn off the PCICLK clocks for low power operation.
PCI_STOP# is synchronized by the
ICS9248-185
internally. The minimum that the PCICLK clocks are enabled (PCI_STOP#
high pulse) is at least 10 PCICLK clocks. PCICLK clocks are stopped in a low state and started with a full high pulse width
guaranteed. PCICLK clock on latency cycles are only three rising PCICLK clocks, off latency is one PCICLK clock.
Notes:
1. All timing is referenced to the Internal CPUCLK (defined as inside the ICS9248 device.)
2. PCI_STOP# is an asynchronous input, and metastable conditions may exist. This signal is required to be synchronized
inside the ICS9248.
3. All other clocks continue to run undisturbed.
4. CLK_STOP# is shown in a high (true) state.
CPUCLK
(Internal)
PCICLK_F
(Internal)
PCICLK_F
(Free-running)
CLK_STOP#
PCICLK [6:0]
PCI_STOP#
相關(guān)PDF資料
PDF描述
ICS9248yF-73-T Replaced by SN74ABT16373A : 16-Bit Transparent D-Type Latches With 3-State Outputs 48-SSOP -40 to 85
ICS9248yF-77 Replaced by SN74ABT16373A : 16-Bit Transparent D-Type Latches With 3-State Outputs 48-SSOP -40 to 85
ICS9248yF-78 16-Bit Transparent D-Type Latches With 3-State Outputs 48-TSSOP -40 to 85
ICS9248yF-81 Frequency Generator & Integrated Buffers
ICS9248yF-87 16-Bit Transparent D-Type Latches With 3-State Outputs 48-TSSOP -40 to 85
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ICS9248AF-152T 制造商:Integrated Device Technology Inc 功能描述:ELECTRONIC COMPONENT
ICS9248AF-80LF 制造商:Integrated Device Technology Inc 功能描述:
ICS9248AF-80T 制造商:Integrated Device Technology Inc 功能描述:ELECTRONIC COMPONENT
ICS9248AF-81 制造商:Ics 功能描述:ELECTRONIC COMPONENT
ICS9248AG-150LN 功能描述:IC FREQUENCY GENERATOR 48-TSSOP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:- 標(biāo)準(zhǔn)包裝:28 系列:- 類型:時(shí)鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時(shí)鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP (0.240",6.10mm 寬) 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件