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參數(shù)資料
| 型號： | ICS9212YF-01-T |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO24 |
| 封裝： | 0.150 INCH, MO-137, SSOP-24 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大小： | 106K |
| 代理商： | ICS9212YF-01-T |
Integrated
Circuit
Systems, Inc.
General Description
Features
ICS9212-01
0267F—06/20/03
Block Diagram
Direct RambusTM Clock Generator
Pin Configuration
The ICS9212-01 is a High-speed clock generator providing
400 MHz differential clock source for direct Rambus
TM
memory system. It includes DDLL (Distributed Delay
locked loop) and phase detection mechanism to
synchronize the direct Rambus channel clock to an
external system clock. ICS9212-01 provides a solution for
a broad range of Direct Rambus memory applications. The
device works in conjunction with the ICS9250-09.
The ICS9212-01 power management support system
turns “off” the Rambus channel clock to minimize power
consumption for mobile and other power –sensitive
applications. In “clock off” mode the device remains “on”
while the output is disabled, allowing fast transitions
between clock-off and clock –on states. In “power down”
mode it completely powers down for minimum power
dissipation.
The ICS9212-01 meets the requirements for input frequency
tracking when the input frequency clock is using Spread
Spectrum clocking and also the optimum bandwidth is
maintained while attenuating the jitter of the reference
signal.
24-Pin 150 Mil SSOP
Compatible with all Direct Rambus based ICs
Up to 400 MHz differential clock source for direct
Rambus memory system
Cycle to cycle jitter is less than 50ps
3.3 + 5% supply
Synchronization flexibility: Supports Systems that
need clock domains of Rambus channel to
synchronize with system or processor clock, or
systems that do not require synchronization of the
Rambus clock to another system clock
Excellent power management support
REFCLK input is from the ICS9250-09.
BUSCLK_STOP#
PLL
Phase
Aligner
Pclk/M
Multi(0:1)
Synclk/N
PD#
FS(0:1)
Refclk
Test MUX
Bypass MUX
Bypclk
PLLclk
GND
2
PAclk
BUSCLKT
BUSCLKC
B
A
Phase
Detector
VDDREF
REFCLK
VDD1
GND1
GND3
PCLK/M
SYNCLK/N
GND2
VDD2
VDDPD
BUSCLK_STOP#
PD#
FS0
FS1
VDD-OUT
GND-OUT
BUSCLKT
N/C
BUSCLKC
GND-OUT
VDD-OUT
MULTI0
MULTI1
GND3
ICS9212-01
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
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| ICS9214DGLF | 功能描述:IC CLOCK GEN RAMBUS XDR 28-TSSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:- 標準包裝:28 系列:- 類型:時鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP （0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件 |
| ICS9214DGLFT | 功能描述:IC CLOCK GEN RAMBUS XDR 28-TSSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:- 標準包裝:28 系列:- 類型:時鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP （0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件 |
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