參數(shù)資料
型號: ICS9173-01
英文描述: Video Genlock PLL
中文描述: 視頻同步鎖相鎖相環(huán)
文件頁數(shù): 1/7頁
文件大小: 129K
代理商: ICS9173-01
Integrated
Circuit
Systems, Inc.
General Description
Features
AV9173-01
Block Diagram
Video Genlock PLL
Phase-detector/VCO circuit block
Ideal for genlock system
Reference clock range 25 kHz to 1 MHz for full
output clock range
Input clocks down to 12kHz possible with restricted
output conditions (see Table 1)
Output clock range 1.25 to 75MHz
On-chip loop filter
Single 5 volt power supply
Low power CMOS technology
Small 8-pin DIP or SOIC package
The
AV9173-01
provides the analog circuit blocks required
for implementing a video genlock dot (pixel) clock
generator. It contains a phase detector, charge pump, loop
filter, and voltage-controlled oscillator (VCO). By grouping
these critical analog blocks into one IC and utilizing
external digital functions, performance and design
flexibility are optimized as are development time and
system cost.
When used with an external clock divider, the
AV9173-01
forms a Phase-Locked Loop configured as a frequency
synthesizer. The
AV9173-01
is designed to accept video
horizontal synchronization (h-sync) pulses and produce a
video dot clock. A separated, negative-going sync input
reference pulse is required at pin 2 (IN).
The
AV9173-01
is also suited for other clock recovery
applications in such areas as data communications.
ICS reserves the right to make changes in the device data identified in this
publication without further notice. ICS advises its customers to obtain the latest
version of all device data to verify that any information being relied upon by the
customer is current and accurate.
AV9173-01 Rev D 06/21/05
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參數(shù)描述
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