參數(shù)資料
型號(hào): ICS8MK4-125.000AJ
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: XO, clock
英文描述: CRYSTAL OSCILLATOR, CLOCK, 125 MHz, LVDS OUTPUT
封裝: ROHS COMPLIANT, CERAMIC PACKAGE-6
文件頁數(shù): 3/5頁
文件大?。?/td> 128K
代理商: ICS8MK4-125.000AJ
8Mx4AJ
www.icst.com/products/hiperclocks.html
REV. B FEBRUARY 10, 2006
3
Integrated
Circuit
Systems, Inc.
ICS8MX4
LVDS CLOCK OSCILLATOR
PRELIMINARY
OFFSET VOLTAGE SETUP
out
LVDS
DC Input
VOS/Δ VOS
V
DD
DIFFERENTIAL OUTPUT VOLTAGE SETUP
100
out
LVDS
DC Input
VOD/Δ VOD
V
DD
OUTPUT SHORT CIRCUIT CURRENT SETUP
out
LVDS
DC Input
IOS
IOSB
V
DD
out
DIFFERENTIAL OUTPUT SHORT CIRCUIT SETUP
out
LVDS
DC Input
I
OSD
V
DD
3.3V, 2.5V LVDS DRIVER TERMINATION
A general LVDS interface is shown in
Figure 1. In a 100
Ω
differential transmission line environment, LVDS drivers
require a matched load termination of 100
Ω across near
FIGURE 1. TYPICAL LVDS DRIVER TERMINATION
the receiver input. For a multiple LVDS outputs buffer, if only
partial outputs are used, it is recommended to terminate the
unused outputs.
APPLICATION INFORMATION
2.5V or 3.3V
+
-
VDD
100 Ohm Differential Transmission Line
R1
100
LVDS_Driv er
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