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參數(shù)資料
| 型號： | ICS87972DYI-147LF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 150 MHz, PROC SPECIFIC CLOCK GENERATOR, PQFP52 |
| 封裝： | 10 X 10 MM, 1.40 MM HEIGHT, MS-026, LQFP-52 |
| 文件頁數(shù)： | 1/14頁 |
| 文件大小： | 264K |
| 代理商： | ICS87972DYI-147LF |
87972DYI-147
www.icst.com/products/hiperclocks.html
REV. A AUGUST 26, 2003
1
Integrated
Circuit
Systems, Inc.
ICS87972I-147
LOW SKEW, 1-TO-12
LVCMOS/LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER
PIN ASSIGNMENT
GENERAL DESCRIPTION
The ICS87972I-147 is a low skew, LVCMOS/LVTTL
Clock Generator and a member of the HiPerClockS
family of High Performance Clock Solutions from
ICS.The ICS87972I-147 has three selectable inputs
and provides 14 LVCMOS/LVTTL outputs.
The ICS87972I-147 is a highly flexible device. Using the crystal
oscillator input, it can be used to generate clocks for a system.
All of these clocks can be the same frequency or the device can
be configured to generate up to three different frequencies among
the three output banks. Using one of the single ended inputs, the
ICS87972I-147 can be used as a zero delay buffer/multiplier/
divider in clock distribution applications.
The three output banks and feedback output each have their
own output dividers which allows the device to generate a
multitude of different bank frequency ratios and output-to-input
frequency ratios. In addition, 2 outputs in Bank C (QC2, QC3)
can be selected to be inverting or non-inverting. The output
frequency range is 10MHz to 150MHz. Input frequency range is
6MHz to 150MHz.
The ICS87972I-147 also has a QSYNC output which can be
used or system synchronization purposes. It monitors Bank A
and Bank C outputs and goes low one period of the faster clock
prior to coincident rising edges of Bank A and Bank C clocks.
QSYNC then goes high again when the coincident rising edges
of Bank A and Bank C occur. This feature is used primarily in
applications where Bank A and Bank C are running at different
frequencies, and is particularly useful when they are running at
non-integer multiples of one another.
Example Applications:
1.
System Clock generator: Use a 16.66 MHz Crystal to
generate eight 33.33MHz copies for PCI and four 100MHz
copies for the CPU or PCI-X.
2.
Line Card Multiplier: Multiply 19.44MHz from a back plane
to 77.76MHz for the line Card ASICs and Serdes.
3.
Zero Delay buffer for Synchronous memory: Fan out up
to twelve 100MHz copies from a memory controller ref-
erence clock to the memory chips on a memory module
with zero delay.
FEATURES
Fully integrated PLL
14 LVCMOS/LVTTL outputs; (12)clocks, (1)feedback, (1)sync
Selectable crystal oscillator interface or LVCMOS/LVTTL
reference clock inputs
CLK0, CLK1 can accept the following input levels:
LVCMOS or LVTTL
Output frequency range: 10MHz to 150MHz
VCO range: 240MHz to 500MHz
Output skew: 200ps (maximum)
Cycle-to-cycle jitter, (all banks ÷4): 55ps (maximum)
Full 3.3V operating supply
-40°C to 85°C ambient operating temperature
Pin compatible with MPC972
Compatible with PowerPCandPentium Microprocessors
FSEL_FB0
V
DD
QFB
GNDO
EXT_FB
QB3
V
DDO
QB2
GNDO
QB1
V
DDO
QB0
GNDO
40
41
42
43
44
45
46
47
48
49
50
51
52
1
2
3
4
5 6
7
8
9 10 11 12 13
26
25
24
23
22
21
20
19
18
17
16
15
14
39 38 37 36 35 34 33 32 31 30 29 28 27
FSEL_B1
FSEL_B0
FSEL_A1
FSEL_A0
QA3
VDDO
QA2
GNDO
QA1
VDDO
QA0
GNDO
VCO_SEL
FSEL_FB1
QSYNC
GNDO
QC0
VDDO
QC1
FSEL_C0
FSEL_C1
QC2
VDDO
QC3
GNDO
INV_CLK
V
DDA
X
T
AL2
X
T
AL1
CLK1
CLK0
CLK_SEL
REF_SEL
PLL_SEL
FSEL_FB2
FRZ_D
A
T
A
FRZ_CLK
nMR/OE
GNDI
52-Lead LQFP
10mm x 10mm x 1.4mm package body
Y package
Top View
ICS87972I-147
HiPerClockS
ICS
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ICS87973BYI | PLL BASED CLOCK DRIVER, 12 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52 |
| ICS87973BYIT | PLL BASED CLOCK DRIVER, 12 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52 |
| ICS87973DYI-147T | PLL BASED CLOCK DRIVER, 13 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52 |
| ICS87973DYI-147LFT | PLL BASED CLOCK DRIVER, 13 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52 |
| ICS87973DYI-147LFT | PLL BASED CLOCK DRIVER, 13 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS87972DYI-147LFT | 功能描述:IC CLK MULT/ZD BUFFER 52-LQFP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:HiPerClockS™ 標準包裝:1,000 系列:- 類型:時鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應商設備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
| ICS87972DYILF | 功能描述:IC CLK MULT/ZD BUFFER 52-LQFP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:HiPerClockS™ 標準包裝:1,000 系列:- 類型:時鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應商設備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
| ICS87972DYILFT | 功能描述:IC CLK MULT/ZD BUFFER 52-LQFP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:HiPerClockS™ 標準包裝:1,000 系列:- 類型:時鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應商設備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
| ICS87973DYI-147LF | 功能描述:IC CLK MULT/ZD BUFFER 52TQFP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:HiPerClockS™ 標準包裝:1,000 系列:- 類型:時鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應商設備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
| ICS87973DYI-147LFT | 功能描述:IC CLK MULT/ZD BUFFER 52TQFP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:HiPerClockS™ 標準包裝:1,000 系列:- 類型:時鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應商設備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
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